Abstract: A programmable resistance circuit provides a selected resistance by configuring a reference resistor to exhibit an effective resistance, in an operational sense, by achieving an average output voltage between a source line and a return line in the programmable resistance circuit. The average output voltage corresponds to the effective resistance. The effective resistance is achieved by utilizing a modulated voltage source to bias a transistor and intermittently draw current across the reference resistor according to the duty cycle of the modulated voltage source. A programmed resistance circuit can produce a selected resistance corresponding to button selection zones of a vehicle user interface when connected to a remote circuit that acts according to a user selection.

Abstract: A programmable resistance circuit provides a selected resistance by configuring a reference resistor to exhibit an effective resistance, in an operational sense, by achieving an average output voltage between a source line and a return line in the programmable resistance circuit. The average output voltage corresponds to the effective resistance. The effective resistance is achieved by utilizing a modulated voltage source to bias a transistor and intermittently draw current across the reference resistor according to the duty cycle of the modulated voltage source. A programmed resistance circuit can produce a selected resistance corresponding to button selection zones of a vehicle user interface when connected to a remote circuit that acts according to a user selection.

Abstract: A programmable resistance circuit provides a selected resistance by configuring a reference resistor to exhibit an effective resistance, in an operational sense, by achieving an average output voltage between a source line and a return line in the programmable resistance circuit. The average output voltage corresponds to the effective resistance. The effective resistance is achieved by utilizing a modulated voltage source to bias a transistor and intermittently draw current across the reference resistor according to the duty cycle of the modulated voltage source. A programmed resistance circuit can produce a selected resistance corresponding to button selection zones of a vehicle user interface when connected to a remote circuit that acts according to a user selection.

Abstract: A programmable resistance circuit provides a selected resistance by configuring a reference resistor to exhibit an effective resistance, in an operational sense, by achieving an average output voltage between a source line and a return line in the programmable resistance circuit. The average output voltage corresponds to the effective resistance. The effective resistance is achieved by utilizing a modulated voltage source to bias a transistor and intermittently draw current across the reference resistor according to the duty cycle of the modulated voltage source. A programmed resistance circuit can produce a selected resistance corresponding to button selection zones of a vehicle user interface when connected to a remote circuit that acts according to a user selection.

Abstract: This invention precisely and automatically measures the protection switch time of modern communication networks such as the SONET or SDH standard. An automated precision measurement device is provided which uses digital error detection and gated counter techniques to accurately measure the time required for a network element to switch from a defective line to a protected line for the purpose of delivering error free service to customer premises. The device accepts a line side signal, demultiplexes a payload test pattern from the standard mapping, and analyzes the payload pattern for errors. If errors are present, the device further measures the time that the errors persist (e.g., the time between the first error present to the last error present, inclusive). If the measurement was made during a protection switch event in the network element, then this time represents an accurate measurement of the protection switch time that affected the service.

Abstract: A protocol and bit rate independent test system for detecting bit errors on a digital communications channel regardless of format or rate, comprising a receiver for receiving an input, a clock recovery unit, a threshold sampling circuit for providing at least two threshold detectors for respective two sampling points including at least one static sampling point positioned proximate to the center of an eye pattern and at least one dynamic sampling point, the output of which are sampled by the recovered clock and if the signal passes between the thresholds, an error signal is generated and counted.

Abstract: A novel graphical user interface for test device applications which permits simultaneous display of system status and alarm information while supporting graphically based test device I/O and configuration. The present invention also includes a novel graphical representation I/O scheme whereby test device configuration is accomplished through intuitive manipulation of an image of the test device. The present invention also includes embedded menuing features and a "one button down" user input section which facilitates ease of operation of the system. The present invention may be advantageously applied to a test device designed to extract and process telecommunications signals such as DS1, DS3, SONET, and ATM communication protocols.

Abstract: A novel high speed telecommunications testing apparatus and method which utilizes field programmable gate arrays to produce dynamic test modules for DS1, DS3, SONET and ATM signals interconnected by a high speed switching fabric. The high speed switch permits the direct exchange of signals from one test module to another thereby permitting simultaneous testing of different communications line protocols and further provides for multiple tests on a single data stream. Individual line interfaces are provided for DS1, DS3, and SONET lines which terminate and frame incoming and outgoing signals. Data exchange between modules in accomplished through the high speed switch fabric.

Abstract: A novel graphical user interface for test device applications which permits simultaneous display of system status and alarm information while supporting graphically based test device I/O and configuration. The present invention also includes a novel graphical representation I/O scheme whereby test device configuration is accomplished through intuitive manipulation of an image of the test device. The present invention also includes embedded menuing features and a "one button down" user input section which facilitates ease of operation of the system. The present invention may be advantageously applied to a test device designed to extract and process telecommunications signals such as DS1, DS3, SONET, and ATM communication protocols.

Abstract: A novel high speed telecommunications testing apparatus and method which utilizes field programmable gate arrays to produce dynamic test modules for DS1, DS3, SONET and ATM signals interconnected by a high speed switching fabric. The high speed switch permits the direct exchange of signals from one test module to another thereby permitting simultaneous testing of different communications line protocols and further provides for multiple tests on a single data stream. Individual line interfaces are provided for DS1, DS3, and SONET lines which terminate and frame incoming and outgoing signals. Data exchange between modules in accomplished through the high speed switch fabric.