Abstract: Embodiments of the present disclosure utilizes the natural properties of RFI noise on a wireline link. Since differential RFI noise in the system has some correlation with the common mode noise on the cable, a replica of RFI noise can be regenerated by an adaptive filter based on information about the common mode noise. The replica RFI is subtracted from the equalizer output prior to the data decision circuitry or slicer. In this method, the system does not require expensive cable, nor does the equalizer suffer additional loss due to an RFI notch filter. Since RFI can be detected and mitigated, this information can also be coupled to safety systems to increase functional safety under high EMI conditions.

Abstract: Embodiments of the present disclosure utilizes the natural properties of RFI noise on a wireline link. Since differential RFI noise in the system has some correlation with the common mode noise on the cable, a replica of RFI noise can be regenerated by an adaptive filter based on information about the common mode noise. The replica RFI is subtracted from the equalizer output prior to the data decision circuitry or slicer. In this method, the system does not require expensive cable, nor does the equalizer suffer additional loss due to an RFI notch filter. Since RFI can be detected and mitigated, this information can also be coupled to safety systems to increase functional safety under high EMI conditions.

Abstract: Embodiments of the present disclosure utilizes the natural properties of RFI noise on a wireline link. Since differential RFI noise in the system has some correlation with the common mode noise on the cable, a replica of RFI noise can be regenerated by an adaptive filter based on information about the common mode noise. The replica RFI is subtracted from the equalizer output prior to the data decision circuitry or slicer. In this method, the system does not require expensive cable, nor does the equalizer suffer additional loss due to an RFI notch filter. Since RFI can be detected and mitigated, this information can also be coupled to safety systems to increase functional safety under high EMI conditions.

Abstract: Embodiments of the present disclosure utilizes the natural properties of RFI noise on a wireline link. Since differential RFI noise in the system has some correlation with the common mode noise on the cable, a replica of RFI noise can be regenerated by an adaptive filter based on information about the common mode noise. The replica RFI is subtracted from the equalizer output prior to the data decision circuitry or slicer. In this method, the system does not require expensive cable, nor does the equalizer suffer additional loss due to an RFI notch filter. Since RFI can be detected and mitigated, this information can also be coupled to safety systems to increase functional safety under high EMI conditions.

Abstract: A successive-approximation register (SAR) analog-to-digital converter (ADC) includes a SAR circuit configured to generate a digital code based on an analog input signal. A digital-to-analog converter (DAC) is configured to convert the digital code to an analog voltage. The SAR circuit is further configured to generate a digital output signal based on a comparison between the analog input signal and the analog voltage. A first capacitor is configured to provide a reference voltage to the DAC. An adaptive charging module is configured to stabilize the reference voltage provided to the DAC by selectively connecting to a supply voltage during a first operating phase of the ADC to store a charge in the adaptive charging module and selectively connecting to the first capacitor during a second operating phase of the ADC to combine the charge stored in the adaptive charging module with a charge of the first capacitor.

Abstract: Aspects of the disclosure provide a sampling circuit with reduced sampling distortions. The sampling circuit can include a switch and a first driving module configured to drive a first signal in response to an input signal onto a first channel terminal of the switch. The sampling circuit also can include a bootstrap module coupled to a control terminal of the switch and a second driving module coupled to the bootstrap module. The second driving module can be configured to drive a second signal in response to the input signal to the bootstrap module, such that the bootstrap module can vary a control voltage on the control terminal based on the input signal for turning on the switch and causing an output voltage on a second channel terminal of the switch to track the first signal on the first channel terminal of the switch.

Abstract: A circuit including first and second reference ladders, a selection circuit, first and second analog to digital converters (ADCs), and a summer. The first reference ladder is configured to provide first reference voltages via first taps. The selection circuit is configured to select one of the first reference voltages. The second reference ladder is configured to, based on the selected one of the first reference voltages, provide second reference voltages via second taps. The first ADC is configured to convert the first version of the analog input signal to a first digital signal. The second ADC is configured to, based on the second reference voltages, convert the second version of the analog input signal to a second digital signal. The summer is configured to generate a digital output signal based on the first and second digital signals.

Abstract: In some implementations, a circuit includes an operational amplifier having a positive input, a negative input, and an output, the output being connected to the negative input; a first capacitor to receive the input signal; a second capacitor connected in series with the first capacitor, the second capacitor to provide a first signal to a positive input of the operational amplifier; a first resistor connected in series with the first capacitor, the first resistor to provide a second signal to the negative input of the operational amplifier; a second resistor to receive the input signal; a third resistor connected in series with the second resistor, the third resistor to provide a third signal to the positive input of the operational amplifier; and a third capacitor connected in series with the second resistor, the third capacitor to provide a fourth signal to the negative input of the operational amplifier.

Abstract: A circuit including first and second reference ladders, a selection circuit, first and second analog to digital converters (ADCs), and a summer. The first reference ladder is configured to provide first reference voltages via first taps. The selection circuit is configured to select one of the first reference voltages. The second reference ladder is configured to, based on the selected one of the first reference voltages, provide second reference voltages via second taps. The first ADC is configured to convert the first version of the analog input signal to a first digital signal. The second ADC is configured to, based on the second reference voltages, convert the second version of the analog input signal to a second digital signal. The summer is configured to generate a digital output signal based on the first and second digital signals.

Abstract: First and second track and hold stages track and store an input voltage for a sample of an analog input signal. A coarse reference ladder provides a plurality of coarse references. The coarse reference ladder includes a first coarse reference and a second coarse reference ladder. A coarse ADC performs a first comparison of the input voltage and the coarse references and outputs a coarse output based on the first comparison. A switch matrix includes switches and is configured to close a switch corresponding to a coarse reference based on the coarse output. A fine reference ladder provides fine references. A fine ADC performs a second comparison of the input voltage and the fine references and outputs a fine output based on the second comparison. Logic outputs a digital output for the sample of the analog input signal based on the coarse output and the fine output.

Abstract: Aspects of the disclosure provide a sampling circuit with reduced sampling distortions. The sampling circuit can include a switch and a first driving module configured to drive a first signal in response to an input signal onto a first channel terminal of the switch. The sampling circuit also can include a bootstrap module coupled to a control terminal of the switch and a second driving module coupled to the bootstrap module. The second driving module can be configured to drive a second signal in response to the input signal to the bootstrap module, such that the bootstrap module can vary a control voltage on the control terminal based on the input signal for turning on the switch and causing an output voltage on a second channel terminal of the switch to track the first signal on the first channel terminal of the switch.

Abstract: Aspects of the disclosure provide a sampling circuit having reduced sampling distortions. The sampling circuit can include a switch having a control terminal, a first channel terminal and a second channel terminal. The first channel terminal can be configured to receive an input signal, and the control terminal can be configured to have a control voltage that varies with regard to the input signal, such that a conducting channel can be formed between the first channel terminal and the second channel terminal to enable an output voltage on the second channel terminal to track the input signal. Further, the sampling circuit can include a bootstrap module coupled to the control terminal of the switch. The bootstrap module can be configured to change the control voltage by a substantially constant value to turn off the conducting channel between the first channel terminal and the second channel terminal in order to hold the output voltage as a sample of the input signal.

Abstract: A sampling circuit can include a switch having a control terminal, a first channel terminal and a second channel terminal. The first channel terminal can be configured to receive an input signal, and the control terminal can be configured to have a control voltage that varies with regard to the input signal, such that a conducting channel can be formed between the first channel terminal and the second channel terminal to enable an output voltage on the second channel terminal to track the input signal. Further, the sampling circuit can include a bootstrap module coupled to the control terminal of the switch. The bootstrap module can be configured to change the control voltage by a substantially constant value to turn off the conducting channel between the first channel terminal and the second channel terminal in order to hold the output voltage as a sample of the input signal.

Abstract: First and second track and hold stages track and store an input voltage for a sample of an analog input signal. A coarse reference ladder provides a plurality of coarse references. The coarse reference ladder includes a first coarse reference and a second coarse reference ladder. A coarse ADC performs a first comparison of the input voltage and the coarse references and outputs a coarse output based on the first comparison. A switch matrix includes switches and is configured to close a switch corresponding to a coarse reference based on the coarse output. A fine reference ladder provides fine references. A fine ADC performs a second comparison of the input voltage and the fine references and outputs a fine output based on the second comparison. Logic outputs a digital output for the sample of the analog input signal based on the coarse output and the fine output.

Abstract: Aspects of the disclosure provide a sampling circuit with reduced sampling distortions. The sampling circuit can include a switch having a control terminal, a first channel terminal and a second channel terminal. Further, the sampling circuit can include a first driving module configured to receive an input signal and drive a first signal in response to the input signal onto the first channel terminal of the switch. In addition, the sampling circuit can include a bootstrap module coupled to the control terminal of the switch and a second driving module coupled to the bootstrap module.

Abstract: First and second track and hold stages track and store an input voltage for a sample of an analog input signal. A coarse reference ladder provides a plurality of coarse references. In one embodiment, the coarse reference ladder includes a first coarse reference and a second coarse reference ladder. A coarse ADC performs a first comparison of the input voltage and the plurality of coarse references and outputs a coarse output based on the first comparison. A switch matrix includes a plurality of switches and is configured to close a switch corresponding to a coarse reference based on the coarse output. A fine reference ladder provides a plurality of fine references. A fine ADC performs a second comparison of the input voltage and the plurality of fine references and outputs a fine output based on the second comparison. Logic outputs a digital output for the sample of the analog input signal based on the coarse output and the fine output.

Abstract: A coarse reference ladder provides a plurality of coarse references. A coarse ADC receives an input voltage. The coarse ADC performs a first comparison of the input voltage and the plurality of coarse references and outputs a coarse output. A switch matrix is configured to close a switch based on the coarse output. An input line corresponding to a coarse reference is coupled to the switch matrix. The input line is precharged to the input voltage. The input line settles from the precharged input voltage to the coarse reference. A fine reference ladder provides a plurality of fine references based on the coarse reference. A fine ADC receives the input voltage and performs a second comparison of the input voltage and the plurality of fine references and outputs a fine output. Logic outputs a digital output for the input voltage based on the coarse output and the fine output.

Abstract: Aspects of the disclosure provide a sampling circuit having reduced sampling distortions. The sampling circuit can include a switch having a control terminal, a first channel terminal and a second channel terminal. The first channel terminal can be configured to receive an input signal, and the control terminal can be configured to have a control voltage that varies with regard to the input signal, such that a conducting channel can be formed between the first channel terminal and the second channel terminal to enable an output voltage on the second channel terminal to track the input signal. Further, the sampling circuit can include a bootstrap module coupled to the control terminal of the switch. The bootstrap module can be configured to change the control voltage by a substantially constant value to turn off the conducting channel between the first channel terminal and the second channel terminal in order to hold the output voltage as a sample of the input signal.

Abstract: Circuits and methods for compensating for an input-dependent gain error in a buffer and/or amplifier circuit, including applying a dynamic current to the input transistor. Circuits generally include a dynamic current supply coupled to a terminal of the input transistor, the dynamic current supply providing a compensating current. The compensating current can have a magnitude equal to the output impedance of the input transistor times a magnitude of the output voltage. The compensating current can be provided via a current mirror, or directly to a terminal of the input transistor. Methods generally include regulating variations in the current through the input transistor by sinking or sourcing a static current and a dynamic current at a terminal of the input transistor. The dynamic current can be regulated in response to a variation in the input signal.

Abstract: In one embodiment, a first resistor ladder includes a first voltage across the first resistor ladder. A second resistor ladder includes a second voltage across the second resistor ladder. A third resistor ladder includes a third voltage across the third resistor ladder. The calibrator receives the first voltage and third voltage and adjusts a current through the third resistor ladder to adjust the third voltage based on the received first voltage and third voltage. A buffer is configured to provide buffering for the third resistor ladder from the second resistor ladder. The third voltage of the third resistor ladder is stable even though the second voltage of the second resistor ladder is changing.