Abstract: An apparatus includes a primary planar quantum well and a planar distribution of dopant atoms. The primary planar quantum well is formed by a lower barrier layer, a central well layer on the lower barrier layer, and an upper barrier layer on the central well layer. Each of the layers is a semiconductor layer. One of the barrier layers has a secondary planar quantum well and is located between the planar distribution of dopant atoms and the central well layer. The primary planar quantum well may be undoped or substantially undoped, e.g., intrinsic semiconductor.

Abstract: An apparatus includes a primary planar quantum well and a planar distribution of dopant atoms. The primary planar quantum well is formed by a lower barrier layer, a central well layer on the lower barrier layer, and an upper barrier layer on the central well layer. Each of the layers is a semiconductor layer. One of the barrier layers has a secondary planar quantum well and is located between the planar distribution of dopant atoms and the central well layer, The primary planar quantum well may be undoped or substantially undoped, e.g., intrinsic semiconductor.

Abstract: An apparatus includes a primary planar quantum well and a planar distribution of dopant atoms. The primary planar quantum well is formed by a lower barrier layer, a central well layer on the lower barrier layer, and an upper barrier layer on the central well layer. Each of the layers is a semiconductor layer. One of the barrier layers has a secondary planar quantum well and is located between the planar distribution of dopant atoms and the central well layer. The primary planar quantum well may be undoped or substantially undoped, e.g., intrinsic semiconductor.

Abstract: An apparatus includes a substrate with a planar surface, a multilayer of semiconductor layers located on the planar surface, a plurality of electrodes located over the multilayer, and a dielectric layer located between the electrodes and the multilayer. The multilayer includes a 2D quantum well. A first set of the electrodes is located to substantially surround a lateral area of the 2D quantum well. A second set of the electrodes is controllable to vary a lateral width of a non-depleted channel between the substantially surrounded lateral area of the 2D quantum well and another area of the 2D quantum well. A third set of the electrodes is controllable to vary an area of a non-depleted portion of the lateral area.

Abstract: An apparatus includes a substrate with a planar surface, a multilayer of semiconductor layers located on the planar surface, a plurality of electrodes located over the multilayer, and a dielectric layer located between the electrodes and the multilayer. The multilayer includes a 2D quantum well. A first set of the electrodes is located to substantially surround a lateral area of the 2D quantum well. A second set of the electrodes is controllable to vary a lateral width of a non-depleted channel between the substantially surrounded lateral area of the 2D quantum well and another area of the 2D quantum well. A third set of the electrodes is controllable to vary an area of a non-depleted portion of the lateral area.

Abstract: An apparatus includes a substrate with a planar surface, a multilayer of semiconductor layers located on the planar surface, a plurality of electrodes located over the multilayer, and a dielectric layer located between the electrodes and the multilayer. The multilayer includes a 2D quantum well. A first set of the electrodes is located to substantially surround a lateral area of the 2D quantum well. A second set of the electrodes is controllable to vary a lateral width of a non-depleted channel between the substantially surrounded lateral area of the 2D quantum well and another area of the 2D quantum well. A third set of the electrodes is controllable to vary an area of a non-depleted portion of the lateral area.

Abstract: An apparatus includes a primary planar quantum well and a planar distribution of dopant atoms. The primary planar quantum well is formed by a lower barrier layer, a central well layer on the lower barrier layer, and an upper barrier layer on the central well layer. Each of the layers is a semiconductor layer. One of the barrier layers has a secondary planar quantum well and is located between the planar distribution of dopant atoms and the central well layer. The primary planar quantum well may be undoped or substantially undoped, e.g., intrinsic semiconductor.

Abstract: An apparatus includes a substrate with a planar surface, a multilayer of semiconductor layers located on the planar surface, a plurality of electrodes located over the multilayer, and a dielectric layer located between the electrodes and the multilayer. The multilayer includes a 2D quantum well. A first set of the electrodes is located to substantially surround a lateral area of the 2D quantum well. A second set of the electrodes is controllable to vary a lateral width of a non-depleted channel between the substantially surrounded lateral area of the 2D quantum well and another area of the 2D quantum well. A third set of the electrodes is controllable to vary an area of a non-depleted portion of the lateral area.

Abstract: An MBE effusion cell is configured to produce an inverted temperature gradient; that is, the top surface of the melt is not cooler than the bottom surface of the melt. In one embodiment, the MBE effusion cell comprises a crucible having tip, central and base regions. First filaments are located laterally adjacent the tip region; second filaments are located laterally adjacent the central region; and third filaments are located laterally adjacent all three of the regions. The radial density of the number of the heater filaments is lower adjacent the base region than adjacent the tip or central regions. In another embodiment, further tailoring of the inverted temperature gradient is obtained by reducing the amount of insulation at the base of the crucible. In another embodiment, at least one heater filament extends substantially along the longitudinal axis of the crucible and is located adjacent its lateral wall.

Abstract: An effusion source comprises a vitreous C filament and a heater to increase the temperature of the filament to produce a C vapor. Also described is a deposition method comprising (a) depositing a layer of material on a substrate, and (b) during step (a), heating a body of material that includes vitreous carbon so that carbon from the body is vaporized and incorporated into the deposited layer.

Abstract: A method includes epitaxially growing a semiconductor layer with a free surface and performing an anneal that reduces atomic roughness on the free surface. The free surface has an orientation with respect to lattice axes of the layer for which atoms in flat regions of the free surface have more chemical bonds to the layer than do, at least, some of the atoms at edges of monolayer steps on the free surface.

Abstract: A hot-electron bolometric mixer/detector, which uses the nonlinearities of the heated two-dimensional electron gas medium, is described. Electrons in the illustrative embodiment of the present invention are “velocity-cooled” rather than “diffusion-cooled” or “phonon-cooled” like hot-electron bolometric mixer/detectors in the prior art. The illustrative embodiment is velocity-cooled when the elastic mean-free path of the electrons is greater than the channel length, L, of the mixer/detector. In this case, the motion of the hot electrons is more accurately modeled by their speed rather than in accordance with diffusion models. This leads to a mixer/detector with a wider modulation bandwidth at a lower power than is exhibited by mixer/detectors in the prior art.

Abstract: A method includes epitaxially growing a semiconductor layer with a free surface and performing an anneal that reduces atomic roughness on the free surface. The free surface has an orientation with respect to lattice axes of the layer for which atoms in flat regions of the free surface have more chemical bonds to the layer than do, at least, some of the atoms at edges of monolayer steps on the free surface.

Abstract: A thin film resonator (TFR) is produced with an improved piezoelectric film which is epitaxially grown on a growing surface, resulting in a piezoelectric film with less grain boundaries. Epitaxial growth refers to the piezoelectric film having a crystallographic orientation take from or emulating the crystallographic orientation of a single crystal substrate or growing surface. For example, by epitaxially growing a piezoelectric film on a single crystal silicon substrate as the growing surface, an improved piezoelectric film is produced with little or no grain boundaries. Also provided is a method of making a TFR in which the piezoelectric film is grown on a substrate. Subsequently, a portion of the substrate is removed, and the electrodes are deposited on either side of the piezoelectric film.

Abstract: Quantum carrier confinement in a wire-like region defined by intersecting layers is significantly enhanced by various structural modifications of a conventional quantum wire device. In that way, operation of the device at room temperature and above is made feasible.