Abstract: A power stage includes: a first transformer; a second transformer; a third transformer; a GaN (gallium nitride) enhancement mode power transistor configured to conduct a load current when driven by a gate current derived from energy transferred by the first transformer; a GaN depletion mode transistor configured to turn off the GaN enhancement mode power transistor absent a threshold voltage applied across a gate and a source of the GaN depletion mode transistor; a voltage clamping device or circuit configured to turn off the GaN depletion mode transistor when reverse biased by a bias current derived from energy transferred by the second transformer; and a GaN enhancement mode transistor configured to turn on the GaN depletion mode transistor when driven by a gate current derived from energy transferred by the third transformer.

Abstract: A unidirectional power switch includes: a normally-on switch device having a normally-on gate, a source, and a drain; a normally-off switch device having a normally-off gate, a source, and a drain, the drain of the normally-off switch device being electrically connected to the source of the normally-on switch device in a cascode configuration; a first source terminal electrically connected to the source of the normally-off switch device; a second source terminal electrically connected to the source of the normally-on switch device; and a drain terminal electrically connected to the drain of the normally-on switch device. The unidirectional power switch is configurable as either a normally-off unidirectional switch or a normally-on unidirectional switch, depending on a configuration of external gate driver connections to the source terminals. Additional power switch embodiments and related methods of configuring the power switches are described, including a configurable bidirectional power switch.

Abstract: A switch device includes at least two bidirectional switches electrically connected in a cascode configuration. A first bidirectional switch and a second bidirectional switch of the at least two bidirectional switches each have a normally-on gate and a normally-off gate. Any remaining bidirectional switch of the at least two bidirectional switches cascoded between the first and second bidirectional switches has a first normally-on gate and a second normally-on gate. The switch device is actively controlled by the normally-off gate of the first bidirectional switch and the normally-off gate of the second bidirectional switch. Each normally-on gate of the at least two bidirectional switches is electrically connected to a source of another one of the at least two bidirectional switches by a voltage blocking device configured to block a portion of the voltage across the switch device when the switch device is off. Additional switch devices embodiments are described.

Abstract: According to some embodiments, a half-bridge circuit is provided. The half-bridge circuit includes a substrate, a monolithic die over the substrate, a switch node, a high-side switch integrated with the monolithic die and coupled to the switch node, and a conductive structure including a first terminal coupled to the substrate and a second terminal coupled to the switch node.

Abstract: A semiconductor device includes a main bi-directional switch formed on a semiconductor substrate and having first and second gates, a first source electrically connected to a first voltage terminal, a second source electrically connected to a second voltage terminal, and a common drain. The semiconductor device further includes a discharge circuit having a plurality of individual transistors or an auxiliary bi-directional switch monolithically integrated with the main bi-directional switch and connected in a common source configuration to the semiconductor substrate. The plurality of individual transistors or the auxiliary bi-directional switch includes a first drain connected to the first source of the main bi-directional switch, a second drain connected to the second source of the main bi-directional switch, and first and second gates each decoupled from gate drive circuitry so that the first and the second gates are controlled at least passively and based on a state of the main bi-directional switch.

Abstract: A voltage regulator module includes: power input and output terminals at a same side of the voltage regulator module; a first power stage configured to receive an input voltage from the power input terminal and output a phase current at a switch node of the first power stage, the first power stage including an inductor having a vertical conductor embedded in a magnetic core, the vertical conductor having a first end which is electrically connected to the switch node and a second end opposite the first end; and a first metal clip which electrically connects the second end of the vertical conductor to the power output terminal such that power is delivered to and from the voltage regulator module at the same side of the voltage regulator module. A method of producing the voltage regulator module and electronic assembly that includes the voltage regulator module are also described.

Abstract: A semiconductor device includes a semiconductor body having an active region and a substrate region that is disposed beneath the active region, and a bidirectional switch formed in the semiconductor body. The bidirectional switch includes first and second gate structures that are each configured to control a conductive state of an electrically conductive channel that is disposed in the active region, and first and second input-output terminals that are each in ohmic contact with the electrically conductive channel. A passive substrate voltage discharge circuit in parallel with the bidirectional switch is configured to discharge a voltage of the substrate region in both directions of the bidirectional switch. The passive substrate voltage discharge circuit includes first and second normally-on switches connected in anti-series between the first and second input-output terminals in a common source configuration with the substrate region as a midpoint.

Abstract: According to some embodiments, a half-bridge circuit is provided. The half-bridge circuit includes a substrate, a monolithic die over the substrate, a switch node, a high-side switch integrated with the monolithic die and coupled to the switch node, and a conductive structure including a first terminal coupled to the substrate and a second terminal coupled to the switch node.

Abstract: A monolithically integrated bidirectional switch includes: an output terminal; a control terminal; a compound semiconductor substrate; a common drift region in the compound semiconductor substrate and in series between the input terminal and the output terminal; a first gate; and a second gate. The first gate is electrically connected to the control terminal and the second gate is electrically connected to the input terminal, or one of the first gate and the second gate is a normally-on gate and the other one of the first gate and the second gate is a normally-off gate. In either case, the monolithically integrated bidirectional switch is configured to conduct current in a single direction from the input terminal to the output terminal through the common drift region. A corresponding power electronic system that uses the monolithically integrated bidirectional switch is also described.

Abstract: A semiconductor device includes a normally-off power transistor integrated in a semiconductor die and a first failsafe pulldown circuit. A gate of the normally-off power transistor is electrically connected to a control terminal of the semiconductor die. The first failsafe pulldown circuit includes a first normally-on pulldown transistor integrated in the semiconductor die and a turn-off time control circuit. A gate of the first normally-on pulldown transistor is electrically connected to a first reference terminal of the semiconductor die. The first normally-on pulldown transistor is configured to pull down the gate of the normally-off power transistor to a voltage below a threshold voltage of the normally-off power transistor when no voltage is applied across the control terminal and the first reference terminal. The turn-off time control circuit is configured to control a turn-off time of the normally-off power transistor.

Abstract: Transformer-driven power switch devices are provided for switching high currents. These devices include power switches, such as Gallium Nitride (GaN) transistors. Transformers are used to transfer both control timing and power for controlling the power switches. These transformers may be coreless, such that they may be integrated within a silicon die. Rectifiers, pulldown control circuitry, and related are preferably integrated in the same die as a power switch, e.g., in a GaN die, such that a transformer-driven switch device is entirely comprised on a silicon die and a GaN die, and does not necessarily require a (large) cored transformer, auxiliary power supplies, or level shifting circuitry.

Abstract: Transformer-driven power switch devices are provided for switching high currents. These devices include power switches, such as Gallium Nitride (GaN) transistors. Transformers are used to transfer both control timing and power for controlling the power switches. These transformers may be coreless, such that they may be integrated within a silicon die. Rectifiers, pulldown control circuitry, and related are preferably integrated in the same die as a power switch, e.g., in a GaN die, such that a transformer-driven switch device is entirely comprised on a silicon die and a GaN die, and does not necessarily require a (large) cored transformer, auxiliary power supplies, or level shifting circuitry.

Abstract: Circuits and devices are provided for reliably holding a normally-off Gallium Nitride (GaN) power transistor, such as a Gate Injection Transistor (GIT), in a non-conducting state when a gate of the power transistor is not driven with an active (turn-on) control signal. This is accomplished by coupling a normally-on pulldown transistor between the gate and the source of the power transistor, such that the pulldown transistor shorts the gate to the source when the power transistor is not set for its conducting state. The pulldown transistor is preferably located on the same semiconductor die as, and in close proximity to, the power transistor, so as to avoid spurious noise at the power transistor gate that may unintentionally turn on the power transistor. A pulldown control circuit is coupled to the gate of the pulldown transistor and autonomously turns off the pulldown transistor when the power transistor is set to conduct.

Abstract: A power converter circuit includes a plurality of input nodes, an output, a plurality of switch and inductor circuits, a plurality of rectifier circuits, a first capacitor network, and a second capacitor network. Each of the plurality of switch and inductor circuits is connected between a respective pair of the plurality of input nodes, and each of the plurality of rectifier circuits is connected between a respective one of the plurality of switch and inductor circuits and the output. The first capacitor network includes at least two capacitors connected between at least one of the plurality of input nodes and the output, and the second capacitor network includes at least one capacitor and is connected to the output. A capacitance of the at least one capacitor of the second capacitor network is greater than a capacitance of each of the at least two capacitors of the first capacitor network.

Abstract: Circuits and devices are provided for reliably maintaining a normally-off Gate Injection Transistor (GIT), or similar, in a non-conducting state when a gate of the GIT is not driven with a turn-on control signal. This is accomplished using a failsafe pulldown coupled to the GIT's gate. The failsafe pulldown includes a resistance modulation circuit, which varies the effective gate resistance of the GIT, such that a low resistance is provided for an interval immediately after a turn-on transition of the GIT, thereby facilitating a high-current pulse for charging the GIT's gate. Subsequently, a high resistance is provided, such that a much lower current is driven to maintain the GIT in its on state. The failsafe pulldown enables a GIT, or similar, to be driven with a relatively simple driver, which may be provided external to the power switch device or integrated in the same die as the power switch.

Abstract: Transformer-driven power switch devices are provided for switching high currents. These devices include power switches, such as Gallium Nitride (GaN) transistors. Transformers are used to transfer both control timing and power for controlling the power switches. These transformers may be careless, such that they may be integrated within a silicon die. Rectifiers, pulldown control circuitry, and related are preferably integrated in the same die as a power switch, e.g., in a GaN die, such that a transformer-driven switch device is entirely comprised on a silicon die and a GaN die, and does not necessarily require a (large) cored transformer, auxiliary power supplies, or level shifting circuitry.

Abstract: Transformer-driven power switch devices are provided for switching high currents. These devices include power switches, such as Gallium Nitride (GaN) transistors. Transformers are used to transfer both control timing and power for controlling the power switches. These transformers may be coreless, such that they may be integrated within a silicon die. Rectifiers, pulldown control circuitry, and related are preferably integrated in the same die as a power switch, e.g., in a GaN die, such that a transformer-driven switch device is entirely comprised on a silicon die and a GaN die, and does not necessarily require a (large) cored transformer, auxiliary power supplies, or level shifting circuitry.

Abstract: Circuits and devices are provided for reliably holding a normally-off Gallium Nitride (GaN) power transistor, such as a Gate Injection Transistor (GIT), in a non-conducting state when a gate of the power transistor is not driven with an active (turn-on) control signal. This is accomplished by coupling a normally-on pulldown transistor between the gate and the source of the power transistor, such that the pulldown transistor shorts the gate to the source when the power transistor is not set for its conducting state. The pulldown transistor is preferably located on the same semiconductor die as, and in close proximity to, the power transistor, so as to avoid spurious noise at the power transistor gate that may unintentionally turn on the power transistor. A pulldown control circuit is coupled to the gate of the pulldown transistor and autonomously turns off the pulldown transistor when the power transistor is set to conduct.

Abstract: A method of operating a converter includes: charging an LC tank coupled between a switching network and a primary winding of a transformer for a first period of time by connecting the LC tank to one or more input capacitors via the switching network, where the switching network includes a first half-bridge coupled between a first supply terminal and a center node, and a second half-bridge coupled between the center node and a second supply terminal; preventing energy transfer from the primary winding of the transformer to a secondary winding of the transformer during the charging of the LC tank; and after charging the LC tank, discharging the LC tank for a second period of time by disconnecting a terminal of the LC tank from the one or more input capacitors.

Abstract: A device includes a semiconductor body having an active region and a substrate region that is beneath the active region. A bidirectional switch is formed in the semiconductor body having first and second gate structures that are configured to block voltage across two polarities as between first and second input-output terminals that are in ohmic contact with the electrically conductive channel. First and second switching devices are configured to electrically connect the substrate region to the first and second input-output terminals, respectively. A passive electrical network includes a first capacitance connected between a control terminal of the first switching device and the second input-output terminal and a second capacitance connected between a control terminal of the second switching device and the first input-output terminal. The passive electrical network is configured temporarily electrically connect the substrate region to the first and second input-output terminal at different voltage conditions.