Patents by Inventor Kenny HUY

Kenny HUY has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230399574
    Abstract: A method to demetal and de-ash oil feedstock. The method includes adding direct steam and sulfuric acid to oil feedstock to form acid treated oil, the sulfuric acid to strip the oil feedstock of metals, adding de-emulsifier to the acid treated oil feedstock to aid in phase separation, and settling the acid treated oil feedstock to separate into clarified oil, water, and a rag layer. The method includes centrifuging the clarified oil with a centrifuge running in a 3 phase configuration to remove water and solids from the clarified oil, and ensuring proper temperature and adding triethanol amine (TEA) to the centrifuged clarified oil to flocculate asphaltenes in the centrifuged clarified oil, creating TEA treated oil. The method includes centrifuging the TEA treated oil with a centrifuge running in a 2 phase configuration to remove the asphaltenes from the TEA treated oil and create marine fuel.
    Type: Application
    Filed: June 8, 2023
    Publication date: December 14, 2023
    Applicant: Tradebe Environmental Services, LLC
    Inventors: Mitch MACE, Ted LONGSDORF, Alex ORTELLS, Kenny HUY
  • Patent number: 11800675
    Abstract: Example implementations relate to a compute node having a chassis with front installed trays. The chassis includes a base, a pair of walls, each coupled to a peripheral side of the base, and a first top cover portion coupled to the pair of walls to cover a portion of the chassis. The compute node further includes a plurality of first latches coupled to a rear end inner surface of the first top cover portion. The plurality of trays is slidable from a front side of the chassis and at least one tray is fastened to at least one first latch. Each tray includes a front cover, a floor coupled to the front cover, a pair of brackets coupled to the floor, a pair of risers, where each riser is coupled to a respective bracket, and a pair of GPU card assemblies, where each GPU card assembly is plugged to a respective riser.
    Type: Grant
    Filed: June 16, 2022
    Date of Patent: October 24, 2023
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Kenny Huy Pham, Earl W. Moore
  • Patent number: 11613908
    Abstract: Example implementations relate to a latch and a computing system including such latch. The latch may include a latch enclosure and a latch assembly housed at least partially within the latch enclosure. The latch assembly may include a lever mounted to the latch enclosure via a first pivot pin and having a handle section disposed outside the latch enclosure and a force transfer section integrated with the handle section and disposed inside the latch enclosure. Further, the latch may include a hook engaged with the lever and mounted at least partially within the latch enclosure via a second pivot pin, wherein a movement of the lever about the first pivot pin causes a movement of the hook about the second pivot pin via the force transfer section.
    Type: Grant
    Filed: February 28, 2020
    Date of Patent: March 28, 2023
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Daniel W. Tower, Earl W. Moore, Kenny Huy Pham
  • Publication number: 20220312624
    Abstract: Example implementations relate to a compute node having a chassis with front installed trays. The chassis includes a base, a pair of walls, each coupled to a peripheral side of the base, and a first top cover portion coupled to the pair of walls to cover a portion of the chassis. The compute node further includes a plurality of first latches coupled to a rear end inner surface of the first top cover portion. The plurality of trays is slidable from a front side of the chassis and at least one tray is fastened to at least one first latch. Each tray includes a front cover, a floor coupled to the front cover, a pair of brackets coupled to the floor, a pair of risers, where each riser is coupled to a respective bracket, and a pair of GPU card assemblies, where each GPU card assembly is plugged to a respective riser.
    Type: Application
    Filed: June 16, 2022
    Publication date: September 29, 2022
    Inventors: Kenny Huy Pham, Earl W. Moore
  • Patent number: 11395431
    Abstract: Example implementations relate to a compute node having a chassis with front installed trays. The chassis includes a base, a pair of walls, each coupled to a peripheral side of the base, and a first top cover portion coupled to the pair of walls to cover a portion of the chassis. The compute node further includes a plurality of first latches coupled to a rear end inner surface of the first top cover portion. The plurality of trays is slidable from a front side of the chassis and at least one tray is fastened to at least one first latch. Each tray includes a front cover, a floor coupled to the front cover, a pair of brackets coupled to the floor, a pair of risers, where each riser is coupled to a respective bracket, and a pair of GPU card assemblies, where each GPU card assembly is plugged to a respective riser.
    Type: Grant
    Filed: June 26, 2020
    Date of Patent: July 19, 2022
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Kenny Huy Pham, Earl W. Moore
  • Publication number: 20210410315
    Abstract: Example implementations relate to a compute node having a chassis with front installed trays. The chassis includes a base, a pair of walls, each coupled to a peripheral side of the base, and a first top cover portion coupled to the pair of walls to cover a portion of the chassis. The compute node further includes a plurality of first latches coupled to a rear end inner surface of the first top cover portion. The plurality of trays is slidable from a front side of the chassis and at least one tray is fastened to at least one first latch. Each tray includes a front cover, a floor coupled to the front cover, a pair of brackets coupled to the floor, a pair of risers, where each riser is coupled to a respective bracket, and a pair of GPU card assemblies, where each GPU card assembly is plugged to a respective riser.
    Type: Application
    Filed: June 26, 2020
    Publication date: December 30, 2021
    Inventors: Kenny Huy Pham, Earl W. Moore
  • Publication number: 20210384659
    Abstract: A system, comprising: a printed circuit board (PCB); and dual in-line memory module (DIMM) socket connectors, to connect to a top side of the PCB and a bottom side of the PCB, each DIMM socket connector including: a socket to accept a memory module; two latches located at opposite ends of the DIMM socket connector to secure a memory module; a first tab at one end of the DIMM socket connector including an aperture to allow for a fastener to pass through; and a second tab at the other end of the DIMM socket connector including an aperture with an insert to secure another fastener.
    Type: Application
    Filed: June 8, 2020
    Publication date: December 9, 2021
    Inventors: Daniel W. TOWER, Earl W. MOORE, Kenny Huy PHAM, Minh NGUYEN
  • Publication number: 20210270056
    Abstract: Example implementations relate to a latch and a computing system including such latch. The latch may include a latch enclosure and a latch assembly housed at least partially within the latch enclosure. The latch assembly may include a lever mounted to the latch enclosure via a first pivot pin and having a handle section disposed outside the latch enclosure and a force transfer section integrated with the handle section and disposed inside the latch enclosure. Further, the latch may include a hook engaged with the lever and mounted at least partially within the latch enclosure via a second pivot pin, wherein a movement of the lever about the first pivot pin causes a movement of the hook about the second pivot pin via the force transfer section.
    Type: Application
    Filed: February 28, 2020
    Publication date: September 2, 2021
    Inventors: Daniel W. TOWER, Earl W. MOORE, Kenny Huy PHAM
  • Patent number: 10849249
    Abstract: An expandable electronics storage chassis includes a base electronics storage tray and an expansion electronics storage tray. The base electronics storage tray has a first end and a second end. The first end includes a first base edge and a first pair of side edges that define a first opening. The expansion electronics storage tray has a third end and a fourth end. The third end includes a second base edge and a second pair of side edges that define a second opening. The fourth end includes a third base edge and a third pair of side edges that define a third opening. When assembled, the second end of the expansion electronics storage tray overlaps and is coupleable to the first end of the base electronics storage tray.
    Type: Grant
    Filed: January 30, 2020
    Date of Patent: November 24, 2020
    Assignee: Hewlett Packard Enterprise Development LP
    Inventor: Kenny Huy Pham
  • Publication number: 20200344903
    Abstract: This disclosure describes designs for chassis with multiple hoods and methods for removing those hoods. A base portion of a chassis includes an opening, a base ridge comprising a first section and a second section, an L-shaped cutout disposed along the first section of the base ridge, and a T-shaped cutout disposed along the second section of the base ridge. The T-shaped cutout includes a front recess and a rear recess.
    Type: Application
    Filed: April 29, 2019
    Publication date: October 29, 2020
    Inventors: Keith Sauer, Paul E. Westphall, Kenny Huy Pham
  • Patent number: 10798837
    Abstract: This disclosure describes designs for chassis with multiple hoods and methods for removing those hoods. A base portion of a chassis includes an opening, a base ridge comprising a first section and a second section, an L-shaped cutout disposed along the first section of the base ridge, and a T-shaped cutout disposed along the second section of the base ridge. The T-shaped cutout includes a front recess and a rear recess.
    Type: Grant
    Filed: April 29, 2019
    Date of Patent: October 6, 2020
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Keith Sauer, Paul E. Westphall, Kenny Huy Pham
  • Patent number: 9939857
    Abstract: Examples include a system comprising chassis and hard drive. In some examples, the hard drive has a set of positioning members and the chassis includes a hard drive slot having a guide rail unit to guide the hard drive into the hard drive slot via a positioning member of the set of positioning members on the hard drive. The chassis also includes a latch assembly connected to the hard drive slot to retain and extract the hard drive.
    Type: Grant
    Filed: March 20, 2017
    Date of Patent: April 10, 2018
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Kenny Huy Pham, Ronald Pinche Tsai, Keith A Sauer, Kelly K Smith
  • Publication number: 20160282972
    Abstract: A method of designing a metal mesh touch sensor with randomized pitch includes placing a first plurality of representations of parallel conductive lines oriented in a first direction with fixed pitch spacing between adjacent representations of parallel conductive lines oriented in the first direction. For each placed representation of a parallel conductive line in the first plurality of representations of parallel conductive lines oriented in the first direction, a first random offset amount within a predetermined randomization constraint is generated. The placed representation of the parallel conductive line is moved by the first random offset.
    Type: Application
    Filed: April 7, 2015
    Publication date: September 29, 2016
    Inventors: Hong Shu, James Steve Posenjak, Kenneth B. Frame, Francisco D. Saldana, Mark Wendt, Larry C. Dodson, Kenny Huy Pham
  • Publication number: 20160070394
    Abstract: A method of designing a bezel circuit includes identifying a plurality of channels in a representation of a conductive pattern. For each channel, a representation of a channel connector is placed that connects to the channel outside a viewable area of the conductive pattern. An interface location outside the viewable area of the conductive pattern is identified. For each channel, a representation of an interface connector within the interface location is placed and a representation of an interconnect route that connects its placed interface connector to its corresponding placed channel connector is placed with at least a minimum interconnect route-to-interconnect route spacing. The at least one interconnect route expands into available space within a bezel area as the interconnect route routes from the interface connector toward the channel connector while maintaining the at least minimum interconnect route-to-interconnect route spacing.
    Type: Application
    Filed: September 9, 2014
    Publication date: March 10, 2016
    Inventors: Daniel Van Ostrand, Kenny Huy Pham