Patents by Inventor Kenny Lee

Kenny Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240152794
    Abstract: The disclosure is directed towards mitigation of qubit crosstalk-induced errors within a quantum computing system (QCS). A compensating signal is provided to one or more qubits. The compensating signal at least partially “cancels-out” (e.g., compensates for) the crosstalk between pairs of qubits. Such crosstalk-induced errors may include leakage of a qubit's quantum state out of the quantum system's computational subspace. Thus, the embodiments may be employed to decrease quantum computational errors occurring from a qubit transitioning (or leaking) to an excited state that is not within the quantum system's computational subspace.
    Type: Application
    Filed: October 26, 2022
    Publication date: May 9, 2024
    Inventors: Benjamin Thomas Chiaro, Zijun Chen, Kenny Lee
  • Patent number: 11615335
    Abstract: The present subject matter provides technical solutions for the technical problems facing quantum computing by improving the accuracy and precision of qubit readout. Technical solutions described herein improves the readout fidelity by reducing the ambiguity between the bright and dark states. In an embodiment, this includes transferring the qubit population that is in the dark quantum state to an auxiliary third state. The auxiliary third state remains dark and reduces the mixing between the logical bright and dark states. This process uses multiple laser pulses to ensure high fidelity population transfer, thus preserving the dark nature of the dark state. Improving readout fidelity of 171Yb+ qubits may improve fidelity by an order of magnitude, such as by improving readout fidelity from 99.9% to 99.99%. This improvement in detection fidelity may substantially increase the computational power of a quantum computer.
    Type: Grant
    Filed: January 6, 2020
    Date of Patent: March 28, 2023
    Assignee: Quantinuum LLC
    Inventors: Nate Burdick, Kenny Lee
  • Publication number: 20230004664
    Abstract: Aspects of the disclosure relate to dynamically controlling access to linked content in electronic communications. A computing platform may receive, from a user computing device, a request for a uniform resource locator associated with an email message and may evaluate the request using one or more isolation criteria. Based on evaluating the request, the computing platform may identify that the request meets at least one isolation condition associated with the one or more isolation criteria. In response to identifying that the request meets the at least one isolation condition associated with the one or more isolation criteria, the computing platform may initiate a browser mirroring session with the user computing device to provide the user computing device with limited access to a resource corresponding to the uniform resource locator associated with the email message.
    Type: Application
    Filed: August 30, 2022
    Publication date: January 5, 2023
    Inventors: Conor Brian Hayes, Michael Edward Jones, Alina V. Khayms, Kenny Lee, David Jonathan Melnick, Adrian Knox Roston
  • Publication number: 20220363073
    Abstract: The techniques described herein relate generally to reconfigurable support pads for fabric image transfers. Specifically, according to one or more embodiments of the present disclosure, reconfigurable support pads are provided for fabric image transfers (e.g., silk screening, heat transfer, direct-to-garment printing, etc.). In particular, the techniques herein provide for various adjustable configurations of portions of the fabric substrate support, which may be changed for different thicknesses of garments, and more particularly, that allow for varied thicknesses found on the same garment. For example, by configuring the support in a first “flat” configuration, a plain tee shirt may lay flat, and then configuring the support in a second “two-tiered” configuration, with one portion lower (or higher) than the other, allows for a hoodie with a thicker pocket portion at the “belly” of the garment to also lay flat.
    Type: Application
    Filed: October 30, 2020
    Publication date: November 17, 2022
    Inventors: Kris Otto Friedrich, Blair Kristine Dorsey, Alex Phelan, Kenny Lee
  • Patent number: 11468185
    Abstract: Aspects of the disclosure relate to dynamically controlling access to linked content in electronic communications. A computing platform may receive, from a user computing device, a request for a uniform resource locator associated with an email message and may evaluate the request using one or more isolation criteria. Based on evaluating the request, the computing platform may identify that the request meets at least one isolation condition associated with the one or more isolation criteria. In response to identifying that the request meets the at least one isolation condition associated with the one or more isolation criteria, the computing platform may initiate a browser mirroring session with the user computing device to provide the user computing device with limited access to a resource corresponding to the uniform resource locator associated with the email message.
    Type: Grant
    Filed: May 15, 2020
    Date of Patent: October 11, 2022
    Assignee: Proofpoint, Inc.
    Inventors: Conor Brian Hayes, Michael Edward Jones, Alina V. Khayms, Kenny Lee, David Jonathan Melnick, Adrian Knox Roston
  • Publication number: 20220212462
    Abstract: A high-speed, closed-loop fabric printer apparatus is provided, comprising a plurality of consecutive stations that can be managed by a single operator. In particular, shirts or other fabric garments may be individually loaded and secured on a pallet by an operator, and the loaded pallets may then cycle through a plurality of unmanned stations positioned along a contiguous path (e.g., oval). The pallet may be configured to expose a main print area and a neck tag area, to allow for both areas to be printed. The pallet may include a neck tag print plate that may elevate the neck tag area to be at the same level as the main print area. In some embodiments, a top coat printing station may apply a top coat to the main print area and/or neck tag area.
    Type: Application
    Filed: May 5, 2020
    Publication date: July 7, 2022
    Inventors: Kris Otto Friedrich, Blair Kristine Dorsey, Alex Phelan, Kenny Lee
  • Publication number: 20200404000
    Abstract: Aspects of the disclosure relate to dynamically controlling access to linked content in electronic communications. A computing platform may receive, from a user computing device, a request for a uniform resource locator associated with an email message. Subsequently, the computing platform may identify that the uniform resource locator associated with the email message corresponds to a potentially-malicious site. In response to identifying that the uniform resource locator associated with the email message corresponds to the potentially-malicious site, the computing platform may determine a risk profile associated with the request received from the user computing device. Based on the risk profile associated with the request, the computing platform may execute an isolation method to provide limited access to the uniform resource locator associated with the email message.
    Type: Application
    Filed: May 15, 2020
    Publication date: December 24, 2020
    Inventors: Conor Brian Hayes, Michael Edward Jones, Alina V. Khayms, Kenny Lee, David Jonathan Melnick, Adrian Knox Roston
  • Publication number: 20200401711
    Abstract: Aspects of the disclosure relate to dynamically controlling access to linked content in electronic communications. A computing platform may receive, from a user computing device, a request for a uniform resource locator associated with an email message and may evaluate the request using one or more isolation criteria. Based on evaluating the request, the computing platform may identify that the request meets at least one isolation condition associated with the one or more isolation criteria. In response to identifying that the request meets the at least one isolation condition associated with the one or more isolation criteria, the computing platform may initiate a browser mirroring session with the user computing device to provide the user computing device with limited access to a resource corresponding to the uniform resource locator associated with the email message.
    Type: Application
    Filed: May 15, 2020
    Publication date: December 24, 2020
    Inventors: Conor Brian Hayes, Michael Edward Jones, Alina V. Khayms, Kenny Lee, David Jonathan Melnick, Adrian Knox Roston
  • Publication number: 20200272931
    Abstract: The present subject matter provides technical solutions for the technical problems facing quantum computing by improving the accuracy and precision of qubit readout. Technical solutions described herein improves the readout fidelity by reducing the ambiguity between the bright and dark states. In an embodiment, this includes transferring the qubit population that is in the dark quantum state to an auxiliary third state. The auxiliary third state remains dark and reduces the mixing between the logical bright and dark states. This process uses multiple laser pulses to ensure high fidelity population transfer, thus preserving the dark nature of the dark state. Improving readout fidelity of 171Yb+ qubits may improve fidelity by an order of magnitude, such as by improving readout fidelity from 99.9% to 99.99%. This improvement in detection fidelity may substantially increase the computational power of a quantum computer.
    Type: Application
    Filed: January 6, 2020
    Publication date: August 27, 2020
    Inventors: Nate Burdick, Kenny Lee
  • Patent number: 9279673
    Abstract: A warpage test system uses a calibration block to calibrate the warpage test system over a temperature profile. The calibration block includes a first metal block bonded to a second metal block. The first metal block includes a first metal and a second different metal. The first metal block includes a CTE different than a CTE of the second metal block. The calibration block is disposed in the warpage test system. A warpage of the calibration block is measured over a temperature profile ranging from 28° C. to 260° C. A deviation between the measured warpage of the calibration block and a known thermal expansion of the calibration block over the temperature profile is recorded. The warpage measurement in a semiconductor package is compensated by the deviation between the measured warpage of the calibration block and the known thermal expansion or warpage of the calibration block over the temperature profile.
    Type: Grant
    Filed: March 18, 2013
    Date of Patent: March 8, 2016
    Assignee: STATS ChipPAC, Ltd.
    Inventors: WonJun Ko, SeungYong Chai, OhHan Kim, GwangTae Kim, Kenny Lee
  • Publication number: 20140269810
    Abstract: A warpage test system uses a calibration block to calibrate the warpage test system over a temperature profile. The calibration block includes a first metal block bonded to a second metal block. The first metal block includes a first metal and a second different metal. The first metal block includes a CTE different than a CTE of the second metal block. The calibration block is disposed in the warpage test system. A warpage of the calibration block is measured over a temperature profile ranging from 28° C. to 260° C. A deviation between the measured warpage of the calibration block and a known thermal expansion of the calibration block over the temperature profile is recorded. The warpage measurement in a semiconductor package is compensated by the deviation between the measured warpage of the calibration block and the known thermal expansion or warpage of the calibration block over the temperature profile.
    Type: Application
    Filed: March 18, 2013
    Publication date: September 18, 2014
    Applicant: STATS CHIPPAC, LTD.
    Inventors: WonJun Ko, SeungYong Chai, OhHan Kim, GwangTae Kim, Kenny Lee
  • Patent number: 8804385
    Abstract: A switching converter IC without a built-in power switching device includes a first terminal serving as a power supply positive connection, a second terminal serving as a power supply return connection, a third terminal serving as the switch-driving connection for controlling the switching duty of an external bipolar or MOSFET power switching device and also serving as a conduit for detection of current drawn by the power switching device to thereby provide overcurrent protection. Feedback information is derived from voltage between the first and the second terminals.
    Type: Grant
    Filed: August 8, 2011
    Date of Patent: August 12, 2014
    Assignee: Mosway Semiconductor Limited
    Inventors: Chiu-Sing Celement Tse, On-Bon Peter Chan, Chik-Yam Lee, Chi-Keung Tang, Chi-Ken Kenny Lee
  • Patent number: 8558366
    Abstract: A method of manufacture of an integrated circuit packaging system includes: providing an integrated circuit; mounting a routing structure having a functional side above the integrated circuit; mounting a vertical interconnect to the functional side of the routing structure and the vertical interconnect extending vertically away from the routing structure; forming an encapsulation covering the integrated circuit, the routing structure, and sides of the vertical interconnect above the routing structure, and leaves a surface of the routing structure exposed from the encapsulation, and a portion of the vertical interconnect exposed from the encapsulation above the surface of the routing structure; mounting a first-external-package-component to the routing structure; and forming a first-external-package-encapsulation covering the first-external-package-component.
    Type: Grant
    Filed: December 13, 2011
    Date of Patent: October 15, 2013
    Assignee: Stats Chippac Ltd.
    Inventors: A Leam Choi, Kenny Lee, In Sang Yoon, HanGil Shin
  • Publication number: 20120086115
    Abstract: A method of manufacture of an integrated circuit packaging system includes: providing an integrated circuit; mounting a routing structure having a functional side above the integrated circuit; mounting a vertical interconnect to the functional side of the routing structure and the vertical interconnect extending vertically away from the routing structure; forming an encapsulation covering the integrated circuit, the routing structure, and sides of the vertical interconnect above the routing structure, and leaves a surface of the routing structure exposed from the encapsulation, and a portion of the vertical interconnect exposed from the encapsulation above the surface of the routing structure; mounting a first-external-package-component to the routing structure; and forming a first-external-package-encapsulation covering the first-external-package-component.
    Type: Application
    Filed: December 13, 2011
    Publication date: April 12, 2012
    Inventors: A Leam Choi, Kenny Lee, In Sang Yoon, HanGil Shin
  • Publication number: 20120049831
    Abstract: A switching converter IC without a built-in power switching device includes a first terminal serving as a power supply positive connection, a second terminal serving as a power supply return connection, a third terminal serving as the switch-driving connection for controlling the switching duty of an external bipolar or MOSFET power switching device and also serving as a conduit for detection of current drawn by the power switching device to thereby provide overcurrent protection. Feedback information is derived from voltage between the first and the second terminals.
    Type: Application
    Filed: August 8, 2011
    Publication date: March 1, 2012
    Inventors: Chiu-Sing Celement Tse, On-Bon Peter Chan, Chik-Yam Lee, Chi-Keung Tang, Chi-Ken Kenny Lee
  • Patent number: 8080446
    Abstract: A method of manufacture of an integrated circuit packaging system includes: providing an integrated circuit; mounting a routing structure having a functional side above the integrated circuit; mounting a vertical interconnect to the functional side of the routing structure and the vertical interconnect extending vertically away from the routing structure; and forming an encapsulation that encapsulates the integrated circuit, the routing structure.
    Type: Grant
    Filed: May 27, 2009
    Date of Patent: December 20, 2011
    Assignee: STATS ChipPAC Ltd.
    Inventors: A Leam Choi, Kenny Lee, In Sang Yoon, HanGil Shin
  • Publication number: 20100301469
    Abstract: A method of manufacture of an integrated circuit packaging system includes: providing an integrated circuit; mounting a routing structure having a functional side above the integrated circuit; mounting a vertical interconnect to the functional side of the routing structure and the vertical interconnect extending vertically away from the routing structure; and forming an encapsulation that encapsulates the integrated circuit, the routing structure, and sides of the vertical interconnect above the routing structure, and leaves a surface of the routing structure exposed from the encapsulation, and a portion of the vertical interconnect exposed from the encapsulation above the surface of the routing structure.
    Type: Application
    Filed: May 27, 2009
    Publication date: December 2, 2010
    Inventors: A Leam Choi, Kenny Lee, In Sang Yoon, HanGil Shin
  • Patent number: 7407080
    Abstract: A capillary tip for a wire bonding tool has a chamfer provided with at least one annular groove. The annular groove is generally oriented in a plane perpendicular to the axis of the capillary. In a sectional view through the capillary axis, the groove profile may be generally part-oval or part circular, such as semicircular or half-oval; or generally rectangular; or generally triangular. In some embodiments the width of the groove profile at the face of the chamfer is at least about one-tenth, more usually at least about one-fifth, the length of the chamfer face; and less than about one-half, more usually less than about one-third, the length of the chamfer face. In some embodiments two or more such grooves are provided. The grooved chamfer can improve the transmission of ultrasonic energy to the wire ball during formation of the bond.
    Type: Grant
    Filed: October 22, 2004
    Date of Patent: August 5, 2008
    Assignee: Chippac, Inc.
    Inventors: Kenny Lee, Hun-Teak Lee, Jong Kook Kim, Chulsik Kim, Ki-Youn Jang
  • Publication number: 20080082070
    Abstract: A method of marketing incontinence products is disclosed. The method includes creating a product offering of incontinence products. The product offering includes first, second and third segments that are distinguished from one another by display segmentation elements. The first segment is directed to male incontinence consumers, the second segment is directed to female incontinence consumers, and the third segment is directed to caregivers. The product offering is then communicated to a retailer and a product display is created at a retail site that resembles the product offering. Either simultaneously or sequentially, the product offering is communicated to potential purchasers, using multimedia advertisement, to inform them of the availability of such disposable absorbent incontinence products.
    Type: Application
    Filed: September 29, 2006
    Publication date: April 3, 2008
    Inventors: David Arthur Fell, Kenny Lee Johnson, Stephen Bradford Cook, Toan Thanh LeMinh, Brian Lee Thomas, Jerome Steven Veith
  • Patent number: D884460
    Type: Grant
    Filed: July 13, 2018
    Date of Patent: May 19, 2020
    Inventors: Daniel Bryce Culp, Kenny Lee Williams, Jr.