Patents by Inventor Kensaku Motoki
Kensaku Motoki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20180212129Abstract: A heat dissipation circuit board includes a printed circuit board including an insulating film and a conductive pattern that is formed on a front-surface side of the insulating film and includes at least one land part and a wiring part connected to the at least one land part; and at least one electronic component mounted on a front-surface side of the at least one land part. In the heat dissipation circuit board, the printed circuit board includes a recess on a side opposite to a side on which the at least one electronic component is mounted, the recess being in at least a portion of a projection region of the at least one land part, the recess extending to the conductive pattern, and includes a thermally conductive adhesive layer filling the recess.Type: ApplicationFiled: July 29, 2015Publication date: July 26, 2018Applicants: SUMITOMO ELECTRIC INDUSTRIES, LTD., SUMITOMO ELECTRIC PRINTED CIRCUITS, INC.Inventors: Hirohisa SAITO, Kensaku MOTOKI
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Patent number: 9618190Abstract: An LED module according to the present invention is an LED module including a plurality of light-emitting diodes, wherein the plural light-emitting diodes are disposed only on a lateral surface of a right cone, a right pyramid, a truncated right cone, or a truncated right pyramid; the lateral surface has an inclination angle of 55° or more and 82° or less with respect to a bottom surface; the plural light-emitting diodes have light-emitting surfaces substantially parallel to the lateral surface; and angles formed between projection lines of lines normal to light-emitting surfaces of adjacent light-emitting diodes or adjacent ones of grouped light-emitting diodes, the projection lines being drawn on the bottom surface, are all equal to each other and are 72° or less.Type: GrantFiled: August 6, 2014Date of Patent: April 11, 2017Assignees: SUMITOMO ELECTRIC PRINTED CIRCUITS, INC., SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventors: Kensaku Motoki, Yoshihiro Akahane, Hirohisa Saito, Manabu Shiozaki
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Publication number: 20160178166Abstract: An LED module according to the present invention is an LED module including a plurality of light-emitting diodes, wherein the plural light-emitting diodes are disposed only on a lateral surface of a right cone, a right pyramid, a truncated right cone, or a truncated right pyramid; the lateral surface has an inclination angle of 55° or more and 82° or less with respect to a bottom surface; the plural light-emitting diodes have light-emitting surfaces substantially parallel to the lateral surface; and angles formed between projection lines of lines normal to light-emitting surfaces of adjacent light-emitting diodes or adjacent ones of grouped light-emitting diodes, the projection lines being drawn on the bottom surface, are all equal to each other and are 72° or less.Type: ApplicationFiled: August 6, 2014Publication date: June 23, 2016Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventors: Kensaku MOTOKI, Yoshihiro AKAHANE, Hirohisa SAITO, Manabu SHIOZAKI
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Patent number: 9305776Abstract: Disclosed is a gallium nitride crystal substrate having a top surface, a bottom surface, regions of higher oxygen concentrations measured by SIMS, and other regions of lower oxygen concentrations measured by SIMS. The top surface is a C-plane surface. The ratio of the highest oxygen concentration to the lowest oxygen concentration is equal to or more than fifty.Type: GrantFiled: December 9, 2014Date of Patent: April 5, 2016Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventors: Kensaku Motoki, Masaki Ueno
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Publication number: 20150369467Abstract: A heat dissipation circuit board comprises a printed circuit board including an insulating film disposed at a back surface and one or more land parts disposed at a front surface, one or more electronic components mounted on the one or more land parts, and an adhesive layer stacked on a back surface of the insulating film. The insulating film and the adhesive layer are removed in a first region that covers at least projection regions of the one or more land parts for each of the electronic components, and removed portions of the insulating film and the adhesive layer are filled with a thermally conductive adhesive.Type: ApplicationFiled: July 22, 2014Publication date: December 24, 2015Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventors: Hirohisa SAITO, Kensaku MOTOKI
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Publication number: 20150194309Abstract: Oxygen can be doped into a gallium nitride crystal by preparing a non-C-plane gallium nitride seed crystal, supplying material gases including nitrogen and oxygen to the non-C-plane gallium nitride seed crystal, growing a non-C-plane gallium nitride crystal on the non-C-plane gallium nitride seed crystal and allowing oxygen to infiltrating via a non-C-plane surface to the growing gallium nitride crystal. Otherwise, oxygen can be doped into a gallium nitride crystal by preparing a C-plane gallium nitride seed crystal or a three-rotationally symmetric plane foreign material seed crystal, supplying material gases including gallium, nitrogen and oxygen to the C-plane gallium nitride seed crystal or the three-rotationally symmetric, foreign seed crystal, growing a faceted C-plane gallium nitride crystal having facets of non-C-planes on the seed crystal, maintaining the facets on the C-plane gallium nitride crystal and allowing oxygen to infiltrating via the non-C-plane facets to the gallium nitride crystal.Type: ApplicationFiled: December 9, 2014Publication date: July 9, 2015Inventors: Kensaku MOTOKI, Masaki UENO
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Patent number: 8933538Abstract: Oxygen can be doped into a gallium nitride crystal by preparing a non-C-plane gallium nitride seed crystal, supplying material gases including gallium, nitrogen and oxygen to the non-C-plane gallium nitride seed crystal, growing a non-C-plane gallium nitride crystal on the non-C-plane gallium nitride seed crystal and allowing oxygen to infiltrating via a non-C-plane surface to the growing gallium nitride crystal. Oxygen-doped {20-21}, {1-101}, {1-100}, {11-20} or {20-22} surface n-type gallium nitride crystals are obtained.Type: GrantFiled: January 3, 2014Date of Patent: January 13, 2015Assignee: Sumitomo Electric Industries, Ltd.Inventors: Kensaku Motoki, Masaki Ueno
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Publication number: 20140117377Abstract: Oxygen can be doped into a gallium nitride crystal by preparing a non-C-plane gallium nitride seed crystal, supplying material gases including gallium, nitrogen and oxygen to the non-C-plane gallium nitride seed crystal, growing a non-C-plane gallium nitride crystal on the non-C-plane gallium nitride seed crystal and allowing oxygen to infiltrating via a non-C-plane surface to the growing gallium nitride crystal. Oxygen-doped {20-21}, {1-101}, {1-100}, {11-20} or {20-22} surface n-type gallium nitride crystals are obtained.Type: ApplicationFiled: January 3, 2014Publication date: May 1, 2014Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventors: Kensaku MOTOKI, Masaki UENO
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Patent number: 8679955Abstract: A method for forming an epitaxial wafer is provided as one enabling growth of a gallium nitride based semiconductor with good crystal quality on a gallium oxide region. In step S107, an AlN buffer layer 13 is grown. In step S108, at a time t5, a source gas G1 containing hydrogen, trimethylaluminum, and ammonia, in addition to nitrogen, is supplied into a growth reactor 10 to grow the AlN buffer layer 13 on a primary surface 11a. The AlN buffer layer 13 is so called a low-temperature buffer layer. After a start of film formation of the buffer layer 13, in step S109 supply of hydrogen (H2) is started at a time t6. At the time t6, H2, N2, TMA, and NH3 are supplied into the growth reactor 10. A supply amount of hydrogen is increased between times t6 and t7, and at the time t7 the increase of hydrogen is terminated to supply a constant amount of hydrogen. At the time t7, H2, TMA, and NH3 are supplied into the growth reactor 10.Type: GrantFiled: February 10, 2010Date of Patent: March 25, 2014Assignees: Sumitomo Electric Industries, Ltd., KOHA Co., Ltd.Inventors: Shin Hashimoto, Katsushi Akita, Kensaku Motoki, Hideaki Nakahata, Shinsuke Fujiwara
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Patent number: 8633093Abstract: Oxygen can be doped into a gallium nitride crystal by preparing a non-C-plane gallium nitride seed crystal, supplying material gases including gallium, nitrogen and oxygen to the non-C-plane gallium nitride seed crystal, growing a non-C-plane gallium nitride crystal on the non-C-plane gallium nitride seed crystal and allowing oxygen to infiltrating via a non-C-plane surface to the growing gallium nitride crystal. Oxygen-doped {20-21}, {1-101}, {1-100}, {11-20} or {20-22} surface n-type gallium nitride crystals are obtained.Type: GrantFiled: February 22, 2011Date of Patent: January 21, 2014Assignee: Sumitomo Electric Industries Ltd.Inventors: Kensaku Motoki, Masaki Ueno
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Patent number: 8592289Abstract: A gallium nitride based semiconductor device is provided which includes a gallium nitride based semiconductor film with a flat c-plane surface provided on a gallium oxide wafer. A light emitting diode LED includes a gallium oxide support base 32 having a primary surface 32a of monoclinic gallium oxide, and a laminate structure 33 of Group III nitride. A semiconductor mesa of the laminate structure 33 includes a low-temperature GaN buffer layer 35, an n-type GaN layer 37, an active layer 39 of a quantum well structure, and a p-type gallium nitride based semiconductor layer 37. The p-type gallium nitride based semiconductor layer 37 includes, for example, a p-type AlGaN electron block layer and a p-type GaN contact layer. The primary surface 32a of the gallium oxide support base 32 is inclined at an angle of not less than 2 degrees and not more than 4 degrees relative to a (100) plane of monoclinic gallium oxide.Type: GrantFiled: February 4, 2010Date of Patent: November 26, 2013Assignees: Sumitomo Electric Industries, Ltd., KOHA Co., Ltd.Inventors: Shin Hashimoto, Katsushi Akita, Shinsuke Fujiwara, Hideaki Nakahata, Kensaku Motoki
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Publication number: 20130244406Abstract: A fabrication method of a group III nitride crystal substance includes the steps of cleaning the interior of a reaction chamber by introducing HCl gas into the reaction chamber, and vapor deposition of a group III nitride crystal substance in the cleaned reaction chamber. A fabrication apparatus of a group III nitride crystal substance includes a configuration to introduce HCl gas into the reaction chamber, and a configuration to grow a group III nitride crystal substance by HVPE. Thus, a fabrication method of a group III nitride crystal substance including the method of effectively cleaning deposits adhering inside the reaction chamber during crystal growth, and a fabrication apparatus employed in the fabrication method are provided.Type: ApplicationFiled: February 26, 2013Publication date: September 19, 2013Applicant: Sumitomo Electric Industries, Ltd.Inventors: Hitoshi KASAI, Takuji Okahisa, Shunsuke Fujita, Naoki Matsumoto, Hideyuki Ijiri, Fumitaka Sato, Kensaku Motoki, Seiji Nakahata, Koji Uematsu, Ryu Hirota
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Patent number: 8502238Abstract: A nitride semiconductor laser device with a reduction in internal crystal defects and an alleviation in stress, and a semiconductor optical apparatus comprising this nitride semiconductor laser device. First, a growth suppressing film against GaN crystal growth is formed on the surface of an n-type GaN substrate equipped with alternate stripes of dislocation concentrated regions showing a high density of crystal defects and low-dislocation regions so as to coat the dislocation concentrate regions. Next, the n-type GaN substrate coated with the growth suppressing film is overlaid with a nitride semiconductor layer by the epitaxial growth of GaN crystals. Further, the growth suppressing film is removed to adjust the lateral distance between a laser waveguide region and the closest dislocation concentrated region to 40 ?m or more.Type: GrantFiled: November 28, 2012Date of Patent: August 6, 2013Assignees: Sharp Kabushiki Kaisha, Sumitomo Electric Industries, Ltd.Inventors: Shigetoshi Ito, Takayuki Yuasa, Yoshihiro Ueta, Mototaka Taneya, Zenpei Tani, Kensaku Motoki
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Publication number: 20130114633Abstract: A nitride semiconductor laser device with a reduction in internal crystal defects and an alleviation in stress, and a semiconductor optical apparatus comprising this nitride semiconductor laser device. First, a growth suppressing film against GaN crystal growth is formed on the surface of an n-type GaN substrate equipped with alternate stripes of dislocation concentrated regions showing a high density of crystal defects and low-dislocation regions so as to coat the dislocation concentrate regions. Next, the n-type GaN substrate coated with the growth suppressing film is overlaid with a nitride semiconductor layer by the epitaxial growth of GaN crystals. Further, the growth suppressing film is removed to adjust the lateral distance between a laser waveguide region and the closest dislocation concentrated region to 40 ?m or more.Type: ApplicationFiled: November 28, 2012Publication date: May 9, 2013Inventors: Shigetoshi ITO, Takayuki YUASA, Yoshihiro UETA, Mototaka TANEYA, Zenpei TANI, Kensaku MOTOKI
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Patent number: 8415180Abstract: Provided is a method for fabricating a wafer product including an active layer grown on a gallium oxide substrate and allowing an improvement in emission intensity. In step S105, a buffer layer 13 comprised of a Group III nitride such as GaN, AlGaN, or AlN is grown at 600 Celsius degrees on a primary surface 11a of a gallium oxide substrate 11. After the growth of the buffer layer 13, while supplying a gas G2, which contains hydrogen and nitrogen, into a growth reactor 10, the gallium oxide substrate 11 and the buffer layer 13 are exposed to an atmosphere in the growth reactor 11 at 1050 Celsius degrees. A Group III nitride semiconductor layer 15 is grown on the modified buffer layer. The modified buffer layer includes, for example, voids. The Group III nitride semiconductor layer 15 can be comprised of GaN and AlGaN. When the Group III nitride semiconductor layer 15 is formed of these materials, excellent crystal quality is obtained on the modified buffer layer 14.Type: GrantFiled: March 1, 2010Date of Patent: April 9, 2013Assignees: Sumitomo Electric Industries, Ltd., Koha Co., Ltd.Inventors: Shin Hashimoto, Katsushi Akita, Kensaku Motoki, Shinsuke Fujiwara, Hideaki Nakahata
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Patent number: 8404569Abstract: A fabrication method of a group III nitride crystal substance includes the steps of cleaning the interior of a reaction chamber by introducing HCl gas into the reaction chamber, and vapor deposition of a group III nitride crystal substance in the cleaned reaction chamber. A fabrication apparatus of a group III nitride crystal substance includes a configuration to introduce HCl gas into the reaction chamber, and a configuration to grow a group III nitride crystal substance by HVPE. Thus, a fabrication method of a group III nitride crystal substance including the method of effectively cleaning deposits adhering inside the reaction chamber during crystal growth, and a fabrication apparatus employed in the fabrication method are provided.Type: GrantFiled: November 18, 2010Date of Patent: March 26, 2013Assignee: Sumitomo Electric Industries, Ltd.Inventors: Hitoshi Kasai, Takuji Okahisa, Shunsuke Fujita, Naoki Matsumoto, Hideyuki Ijiri, Fumitaka Sato, Kensaku Motoki, Seiji Nakahata, Koji Uematsu, Ryu Hirota
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Patent number: 8334544Abstract: A nitride semiconductor laser device with a reduction in internal crystal defects and an alleviation in stress, and a semiconductor optical apparatus comprising this nitride semiconductor laser device. First, a growth suppressing film against GaN crystal growth is formed on the surface of an n-type GaN substrate equipped with alternate stripes of dislocation concentrated regions showing a high density of crystal defects and low-dislocation regions so as to coat the dislocation concentrate regions. Next, the n-type GaN substrate coated with the growth suppressing film is overlaid with a nitride semiconductor layer by the epitaxial growth of GaN crystals. Further, the growth suppressing film is removed to adjust the lateral distance between a laser waveguide region and the closest dislocation concentrated region to 40 ?m or more.Type: GrantFiled: July 14, 2010Date of Patent: December 18, 2012Assignees: Sharp Kabushiki Kaisha, Sumitomo Electric Industries, Ltd.Inventors: Shigetoshi Ito, Takayuki Yuasa, Yoshihiro Ueta, Mototaka Taneya, Zenpei Tani, Kensaku Motoki
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Patent number: 8198177Abstract: Seeds are implanted in a regular pattern upon an undersubstrate. An AlxInyGa1-x-yN (0?x?1, 0?y?1, 0<x+y?1) mixture crystal is grown on the seed implanted undersubstrate by a facet growth method. The facet growth makes facet pits above the seeds. The facets assemble dislocations to the pit bottoms from neighboring regions and make closed defect accumulating regions (H) under the facet bottoms. The closed defect accumulating regions (H) arrest dislocations permanently. Release of dislocations, radial planar defect assemblies and linear defect assemblies are forbidden. The surrounding accompanying low dislocation single crystal regions (Z) and extra low dislocation single crystal regions (Y) are low dislocation density single crystals.Type: GrantFiled: October 25, 2011Date of Patent: June 12, 2012Assignee: Sumitomo Electric Industries, Ltd.Inventors: Seiji Nakahata, Ryu Hirota, Kensaku Motoki, Takuji Okahisa, Kouji Uematsu
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Publication number: 20120070929Abstract: Provided is a method for fabricating a wafer product including an active layer grown on a gallium oxide substrate and allowing an improvement in emission intensity. In step S105, a buffer layer 13 comprised of a Group III nitride such as GaN, AlGaN, or AlN is grown at 600 Celsius degrees on a primary surface 11a of a gallium oxide substrate 11. After the growth of the buffer layer 13, while supplying a gas G2, which contains hydrogen and nitrogen, into a growth reactor 10, the gallium oxide substrate 11 and the buffer layer 13 are exposed to an atmosphere in the growth reactor 11 at 1050 Celsius degrees. A Group III nitride semiconductor layer 15 is grown on the modified buffer layer. The modified buffer layer includes, for example, voids. The Group III nitride semiconductor layer 15 can be comprised of GaN and AlGaN. When the Group III nitride semiconductor layer 15 is formed of these materials, excellent crystal quality is obtained on the modified buffer layer 14.Type: ApplicationFiled: March 1, 2010Publication date: March 22, 2012Applicants: KOHA Co., Ltd., Sumitomo Electric Industries, Ltd.Inventors: Shin Hashimoto, Katsushi Akita, Kensaku Motoki, Shinsuke Fujiwara, Hideaki Nakahata
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Publication number: 20120040511Abstract: Seeds are implanted in a regular pattern upon an undersubstrate. An AlxInyGa1?x?yN (0?x?1, 0?y?1, 0<x+y?1) mixture crystal is grown on the seed implanted undersubstrate by a facet growth method. The facet growth makes facet pits above the seeds. The facets assemble dislocations to the pit bottoms from neighboring regions and make closed defect accumulating regions (H) under the facet bottoms. The closed defect accumulating regions (H) arrest dislocations permanently. Release of dislocations, radial planar defect assemblies and linear defect assemblies are forbidden. The surrounding accompanying low dislocation single crystal regions (Z) and extra low dislocation single crystal regions (Y) are low dislocation density single crystals.Type: ApplicationFiled: October 25, 2011Publication date: February 16, 2012Applicant: Sumitomo Electric Industries, Ltd.Inventors: Seiji NAKAHATA, Ryu Hirota, Kensaku Motoki, Takuji Okahisa, Kouji Uematsu