Abstract: In an input/output circuit of a microcomputer, an output latch is connected to an internal bus for latching an output data signal. An output tristate buffer has an input connected to receive a latched output data signal from the output latch and an output connected to the input/output terminal. An input tristate buffer is connected at its input to the input/output terminal. An input/output switchover latch is connected to the internal bus for generating a switchover signal, which is supplied directly to a control input of the output buffer and also through an inverter to a control input of the input buffer, so that the output buffer and the input buffer are alternatively activated by the switchover signal in a complementary manner. The input/output switchover latch is initialized in response to an active reset signal.