Patents by Inventor KENSEI TAKAHASHI
KENSEI TAKAHASHI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11563025Abstract: A semiconductor storage device includes first and second stacked bodies, a first semiconductor layer, a first charge storage layer, a conductive layer, and a first silicon oxide layer. The first stacked body includes first insulation layers and first gate electrode layers that are alternately stacked in a first direction. The first semiconductor layer extends in the first stacked body in the first direction. The first charge storage layer is provided between the first semiconductor layer and the first gate electrode layers. The conductive layer is provided between the first stacked body and the second stacked body and extends in the first direction and a second direction. The first silicon oxide layer is provided between the conductive layer and the first gate electrode layers. The first silicon oxide layer containing an impurity being at least one of phosphorus, boron, carbon, and fluorine.Type: GrantFiled: August 27, 2020Date of Patent: January 24, 2023Assignee: KIOXIA CORPORATIONInventors: Yoichi Minemura, Kensei Takahashi, Takashi Asano
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Publication number: 20210296352Abstract: A semiconductor storage device includes first and second stacked bodies, a first semiconductor layer, a first charge storage layer, a conductive layer, and a first silicon oxide layer. The first stacked body includes first insulation layers and first gate electrode layers that are alternately stacked in a first direction. The first semiconductor layer extends in the first stacked body in the first direction. The first charge storage layer is provided between the first semiconductor layer and the first gate electrode layers. The conductive layer is provided between the first stacked body and the second stacked body and extends in the first direction and a second direction. The first silicon oxide layer is provided between the conductive layer and the first gate electrode layers. The first silicon oxide layer containing an impurity being at least one of phosphorus, boron, carbon, and fluorine.Type: ApplicationFiled: August 27, 2020Publication date: September 23, 2021Inventors: Yoichi MINEMURA, Kensei TAKAHASHI, Takashi ASANO
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Patent number: 10978469Abstract: A semiconductor storage device includes a semiconductor substrate; an insulating layer provided on the semiconductor substrate; a barrier metal layer provided on the insulating layer; an aluminum compound layer provided on the barrier metal layer; an amorphous layer provided on the aluminum compound layer and including a material that vaporizes upon its chemical reaction with fluorine; and a metal layer provided on the amorphous layer.Type: GrantFiled: February 27, 2019Date of Patent: April 13, 2021Assignee: TOSHIBA MEMORY CORPORATIONInventors: Kensei Takahashi, Takashi Asano, Satoshi Wakatsuki
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Publication number: 20210010134Abstract: According to an embodiment, a semiconductor manufacturing apparatus includes a chamber, a process gas nozzle, an inert gas nozzle and a hydrogen radical nozzle. The chamber houses at least one substrate. The process gas nozzle is to release process gas toward the substrate in the chamber. The inert gas nozzle is to release inert gas toward the substrate in the chamber. The hydrogen radical nozzle is disposed in the chamber and is to generate hydrogen radicals by heating raw material gas including hydrogen and to release the generated hydrogen radicals toward the substrate during the release of the inert gas. A metal wire is in the hydrogen radical nozzle, and the metal wire includes a metal catalyst for exciting the generation of the hydrogen radicals.Type: ApplicationFiled: September 22, 2020Publication date: January 14, 2021Applicant: Toshiba Memory CorporationInventors: Fumiki Aiso, Kensei Takahashi, Tomohisa Iino
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Patent number: 10854488Abstract: A wafer conveying apparatus conveying a wafer onto a supporting table in manufacturing a semiconductor. A first arm retains the wafer to move to an upper region of the supporting table, and is retracted from the upper region of the supporting table after the wafer is elevated. A second arm contacts the wafer by an opening provided in the supporting table to elevate the wafer, and lowers the wafer to place the wafer on the supporting table.Type: GrantFiled: July 26, 2019Date of Patent: December 1, 2020Assignee: TOSHIBA MEMORY CORPORATIONInventors: Fumiki Aiso, Ryota Fujitsuka, Kensei Takahashi, Takayuki Matsui, Tomohisa Iino
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Patent number: 10669621Abstract: According to the embodiment, a vaporization system includes a vaporizer, a body, a sensor, a moving mechanism, and a supplier. The vaporizer includes a plurality of containers which can store powdered solid materials. The body in a vacuum state can house the vaporizer. The sensor detects a residue of the solid materials stored in a plurality of the containers respectively. The moving mechanism, on the basis of a detection result of the sensor, moves the plurality of the containers respectively between a first position located inside the vaporizer, and a second position located outside of the vaporizer. A supplier supplies the solid material to the container located in the second position among the plurality of the containers.Type: GrantFiled: February 13, 2017Date of Patent: June 2, 2020Assignee: TOSHIBA MEMORY CORPORATIONInventors: Fumiki Aiso, Hajime Nagano, Kensei Takahashi, Tomohisa Iino
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Publication number: 20200066750Abstract: A semiconductor storage device includes a semiconductor substrate; an insulating layer provided on the semiconductor substrate; a barrier metal layer provided on the insulating layer; an aluminum compound layer provided on the barrier metal layer; an amorphous layer provided on the aluminum compound layer and including a material that vaporizes upon its chemical reaction with fluorine; and a metal layer provided on the amorphous layer.Type: ApplicationFiled: February 27, 2019Publication date: February 27, 2020Applicant: TOSHIBA MEMORY CORPORATIONInventors: Kensei TAKAHASHI, Takashi ASANO, Satoshi WAKATSUKI
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Publication number: 20190348314Abstract: In one embodiment, a semiconductor manufacturing apparatus includes a container to contain wafers, and supporting tables provided in the container so as to be stacked on one another, and each including a supporting face that comes into contact with a wafer to support the wafer. The apparatus further includes supporting columns to join the supporting tables together and provided at positions where the supporting columns are contained inside outer circumferences of the supporting tables. The apparatus further includes a gas feeder to feed a gas to the wafers on the supporting tables, and a gas discharger to discharge the gas fed to the wafers on the supporting tables. Each of the supporting tables includes a first upper face as the supporting face, and a second upper face provided so as to surround the first upper face at a level higher than a level of the first upper face.Type: ApplicationFiled: July 26, 2019Publication date: November 14, 2019Applicant: TOSHIBA MEMORY CORPORATIONInventors: Fumiki AISO, Ryota Fujitsuka, Kensei Takahashi, Takayuki Matsui, Tomohisa Iino
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Patent number: 10403531Abstract: In one embodiment, a semiconductor manufacturing apparatus includes a container to contain wafers, and supporting tables provided in the container so as to be stacked on one another, and each including a supporting face that comes into contact with a wafer to support the wafer. The apparatus further includes supporting columns to join the supporting tables together and provided at positions where the supporting columns are contained inside outer circumferences of the supporting tables. The apparatus further includes a gas feeder to feed a gas to the wafers on the supporting tables, and a gas discharger to discharge the gas fed to the wafers on the supporting tables. Each of the supporting tables includes a first upper face as the supporting face, and a second upper face provided so as to surround the first upper face at a level higher than a level of the first upper face.Type: GrantFiled: March 8, 2018Date of Patent: September 3, 2019Assignee: TOSHIBA MEMORY CORPORATIONInventors: Fumiki Aiso, Ryota Fujitsuka, Kensei Takahashi, Takayuki Matsui, Tomohisa Iino
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Patent number: 10355006Abstract: A semiconductor storage device according to an embodiment includes a plurality of memory cells, a first film, and a second film. The memory cells are placed at intervals in a first direction on a semiconductor substrate. The first film is placed continuously in the first direction above the memory cells so as to cover all of the memory cells and including mainly metal oxide. The second film is placed on the first film and including mainly silicon nitride or silicon dioxide.Type: GrantFiled: January 19, 2016Date of Patent: July 16, 2019Assignee: TOSHIBA MEMORY CORPORATIONInventors: Ryota Fujitsuka, Nobuhito Kuge, Kensei Takahashi
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Publication number: 20190071771Abstract: According to an embodiment, a semiconductor manufacturing apparatus includes a chamber, a process gas nozzle, an inert gas nozzle and a hydrogen radical nozzle. The chamber houses at least one substrate. The process gas nozzle is to release process gas toward the substrate in the chamber. The inert gas nozzle is to release inert gas toward the substrate in the chamber. The hydrogen radical nozzle is disposed in the chamber and is to generate hydrogen radicals by heating raw material gas including hydrogen and to release the generated hydrogen radicals toward the substrate during the release of the inert gas. A metal wire is in the hydrogen radical nozzle, and the metal wire includes a metal catalyst for exciting the generation of the hydrogen radicals.Type: ApplicationFiled: March 13, 2018Publication date: March 7, 2019Applicant: TOSHIBA MEMORY CORPORATIONInventors: Fumiki AISO, Kensei TAKAHASHI, Tomohisa IINO
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Publication number: 20190067066Abstract: In one embodiment, a semiconductor manufacturing apparatus includes a container to contain wafers, and supporting tables provided in the container so as to be stacked on one another, and each including a supporting face that comes into contact with a wafer to support the wafer. The apparatus further includes supporting columns to join the supporting tables together and provided at positions where the supporting columns are contained inside outer circumferences of the supporting tables. The apparatus further includes a gas feeder to feed a gas to the wafers on the supporting tables, and a gas discharger to discharge the gas fed to the wafers on the supporting tables. Each of the supporting tables includes a first upper face as the supporting face, and a second upper face provided so as to surround the first upper face at a level higher than a level of the first upper face.Type: ApplicationFiled: March 8, 2018Publication date: February 28, 2019Applicant: TOSHIBA MEMORY CORPORATIONInventors: Fumiki AISO, Ryota FUJITSUKA, Kensei TAKAHASHI, Takayuki MATSUI, Tomohisa IINO
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Publication number: 20180057926Abstract: According to the embodiment, a vaporization system includes a vaporizer, a body, a sensor, a moving mechanism, and a supplier. The vaporizer includes a plurality of containers which can store powdered solid materials. The body in a vacuum state can house the vaporizer. The sensor detects a residue of the solid materials stored in a plurality of the containers respectively. The moving mechanism, on the basis of a detection result of the sensor, moves the plurality of the containers respectively between a first position located inside the vaporizer, and a second position located outside of the vaporizer. A supplier supplies the solid material to the container located in the second position among the plurality of the containers.Type: ApplicationFiled: February 13, 2017Publication date: March 1, 2018Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Fumiki AISO, Hajime NAGANO, Kensei TAKAHASHI, Tomohisa llNO
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Publication number: 20170069534Abstract: A semiconductor storage device according to an embodiment includes a plurality of memory cells, a first film, and a second film. The memory cells are placed at intervals in a first direction on a semiconductor substrate. The first film is placed continuously in the first direction above the memory cells so as to cover all of the memory cells and including mainly metal oxide. The second film is placed on the first film and including mainly silicon nitride or silicon dioxide.Type: ApplicationFiled: January 19, 2016Publication date: March 9, 2017Applicant: Kabushiki Kaisha ToshibaInventors: Ryota FUJITSUKA, Nobuhito KUGE, Kensei TAKAHASHI
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Publication number: 20160208382Abstract: A semiconductor manufacturing apparatus according to an embodiment includes a reaction chamber that is capable of housing a semiconductor substrate and is capable of forming a deposited film on a surface of the semiconductor substrate. A first container stores a source of the deposited film. A second container stores a source gas generated in the first container, and supplies the source gas to the reaction chamber. A first pipe connects the first container and the second container. A second pipe supplies an inert gas to the second container.Type: ApplicationFiled: July 29, 2015Publication date: July 21, 2016Applicant: Kabushiki Kaisha ToshibaInventors: Kensei Takahashi, Kazuhiro Matsuo, Fumiki Aiso
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Patent number: 9224874Abstract: A semiconductor storage device according to the present embodiment includes a semiconductor substrate. A tunnel insulating film is provided on the semiconductor substrate. A charge accumulation layer is provided on the tunnel insulating film. An intermediate dielectric film is provided on the charge accumulation layer. A control gate electrode is formed on the intermediate dielectric film. The intermediate dielectric film includes a laminated film of silicon oxide films of multiple layers and silicon nitride films of at least one layer, and a silicon oxynitride film provided between adjacent ones of the silicon oxide films and the silicon nitride films.Type: GrantFiled: March 7, 2014Date of Patent: December 29, 2015Assignee: KABUSHIKI KAISHA TOSHIBAInventors: Kazuhiro Matsuo, Masayuki Tanaka, Masao Shingu, Kensei Takahashi, Fumiki Aiso
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Publication number: 20150255482Abstract: A semiconductor storage device according to an embodiment includes a semiconductor layer. A tunnel dielectric film is formed on the semiconductor layer. A charge accumulation layer is formed on the tunnel dielectric film. A block film is formed on the charge accumulation layer. A control gate is formed on the block film. The block film includes a metal oxide film containing nitrogen in a concentration range equal to or lower than 5×1021 atoms/cm3 and consisting mainly of aluminum.Type: ApplicationFiled: June 20, 2014Publication date: September 10, 2015Applicant: Kabushiki Kaisha ToshibaInventors: Kensei TAKAHASHI, Kazuhiro Matsuo, Fumiki Aiso, Masao Shingu, Masayuki Tanaka
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Publication number: 20150200307Abstract: A semiconductor storage device according to the present embodiment includes a semiconductor substrate. A tunnel insulating film is provided on the semiconductor substrate. A charge accumulation layer is provided on the tunnel insulating film. An intermediate dielectric film is provided on the charge accumulation layer. A control gate electrode is formed on the intermediate dielectric film. The intermediate dielectric film includes a laminated film of silicon oxide films of multiple layers and silicon nitride films of at least one layer, and a silicon oxynitride film provided between adjacent ones of the silicon oxide films and the silicon nitride films.Type: ApplicationFiled: March 7, 2014Publication date: July 16, 2015Applicant: KABUSHIKI KAISHA TOSHIBAInventors: KAZUHIRO MATSUO, MASAYUKI TANAKA, MASAO SHINGU, KENSEI TAKAHASHI, FUMIKI AISO