Patents by Inventor Kensuke Yamaoka

Kensuke Yamaoka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10847405
    Abstract: A semiconductor device manufacturing method includes: (A) orienting an upper surface of a semiconductor element which has the upper surface and a suction surface of a collet which has a suction hole so that the upper surface of the semiconductor device and the suction surface of the collet face each other, the upper surface including a first region and a second region, the second region lying higher than the first region; (B) bringing the suction surface of the collet into contact with a part of the second region of the semiconductor element; and (C) picking up the semiconductor element using the collet while the collet sucks in air between the first region and the suction surface via the suction hole, wherein in (B), an entirety of an uppermost surface of the second region is in contact with a region of the suction surface exclusive of the suction hole.
    Type: Grant
    Filed: August 30, 2018
    Date of Patent: November 24, 2020
    Assignee: NICHIA CORPORATION
    Inventor: Kensuke Yamaoka
  • Publication number: 20200328328
    Abstract: A light emitting device includes: a substrate; a light emitting element disposed on the substrate; a light transmissive member having a plate shape and having an upper face and a lower face that is larger than the upper face, disposed such that the lower face opposes a light emission face of the light emitting element; a light reflecting member covering lateral faces of the light transmissive member; and a light shielding frame covering lateral faces of the light transmissive member via the light reflecting member. The light shielding frame has an opening. An outer perimeter of the lower face of the light transmissive member is positioned outward of an inner perimeter of the opening in a plan view as seen from above.
    Type: Application
    Filed: June 29, 2020
    Publication date: October 15, 2020
    Applicant: NICHIA CORPORATION
    Inventors: Hiroki NAKAI, Kensuke YAMAOKA
  • Patent number: 10741727
    Abstract: A light emitting device includes: a substrate; a light emitting element disposed on the substrate; a light transmissive member having a plate shape and having an upper face and a lower face disposed such that the lower face opposes a light emission face of the light emitting element; a light reflecting member covering lateral faces of the light emitting element and lateral faces of the light transmissive member; and a light shielding frame disposed on the upper face of the light reflecting member surrounding the light transmissive member. The light shielding frame has an opening, an inner perimeter of the opening is positioned at a distance apart from an outer perimeter of the upper face of the light transmissive member in a plan view as seen from above, and the light reflecting member is interposed between the inner perimeter of the opening and the outer perimeter of the upper face of the light transmissive member.
    Type: Grant
    Filed: November 28, 2018
    Date of Patent: August 11, 2020
    Assignee: NICHIA CORPORATION
    Inventors: Hiroki Nakai, Kensuke Yamaoka
  • Publication number: 20200243740
    Abstract: A light emitting element includes a semiconductor layered body, an insulating film, first and second electrodes, first external connecting parts and at least one second external connecting part. The semiconductor layered body includes a first semiconductor layer, a light emitting layer, and a second semiconductor layer. The first electrode is connected to the first semiconductor layer at exposed parts through openings in the insulating film, and partially arranged on the second semiconductor layer via the insulating film. The first external connecting parts are connected to the first electrode. The first external connecting parts are spaced apart from the exposed parts in a plan view, and at least two of the first external connecting parts being arranged between at least one set of adjacent ones of the exposed parts in the plan view. The second external connecting part is connected to the second electrode.
    Type: Application
    Filed: April 14, 2020
    Publication date: July 30, 2020
    Inventors: Hiroki NAKAI, Kensuke YAMAOKA
  • Publication number: 20200212255
    Abstract: A light emitting device manufacturing method includes: disposing n pieces of light emitting elements in m rows on a substrate block, where an interval between a kth light emitting element from one end of rows and a (k+1)th light emitting element has a first distance; disposing a phosphor member on the light emitting elements; disposing a frame member to surround the light emitting elements; disposing a cover member in each area surrounded by the frame member to cover lateral surfaces of the light emitting elements and the phosphor members while forming recesses at an upper surface between the kth light emitting elements and the (k+1)th light emitting elements apart by the first distance; disposing a light shielding member in each recess; and cutting the light shielding members, the cover members, and the substrate block between the light emitting elements that are apart by the first distance.
    Type: Application
    Filed: December 26, 2019
    Publication date: July 2, 2020
    Applicant: Nichia Corporation
    Inventor: Kensuke YAMAOKA
  • Patent number: 10658559
    Abstract: A light emitting element includes a semiconductor layered body, an insulating film, first and second electrodes, first external connecting parts and at least one second external connecting part. The semiconductor layered body includes a first semiconductor layer, a light emitting layer, and a second semiconductor layer. The first electrode is connected to the first semiconductor layer at exposed parts through openings in the insulating film, and partially arranged on the second semiconductor layer via the insulating film. The first external connecting parts are connected to the first electrode. The first external connecting parts are spaced apart from the exposed parts in a plan view. A group comprising at least one of the first external connecting parts and other group comprising at least one of the first external connecting parts respectively surround adjacent ones of the exposed parts while being spaced apart from each other in the plan view.
    Type: Grant
    Filed: February 13, 2019
    Date of Patent: May 19, 2020
    Assignee: NICHIA CORPORATION
    Inventors: Hiroki Nakai, Kensuke Yamaoka
  • Publication number: 20200096163
    Abstract: A method for manufacturing a light-emitting device includes: a mounting step; a light-shielding frame placement step; a light-transmissive member placement step; a light-guiding supporting member formation step; a light-guiding supporting member bonding step; and a second light-reflective member formation step.
    Type: Application
    Filed: September 25, 2019
    Publication date: March 26, 2020
    Applicant: NICHIA CORPORATION
    Inventor: Kensuke YAMAOKA
  • Publication number: 20190302350
    Abstract: A method of manufacturing a light emitting device includes: mounting a light emitting element on a substrate; disposing a light shielding frame on a sheet, the light shielding frame having an opening; disposing a plate-shaped light transmissive member in the opening, the plate-shaped light transmissive member having a first face and a second face opposite the first face, wherein an outer perimeter of the first face is smaller than an inner perimeter of the opening; forming a light guide support member by filling the space with a first light reflecting member; bonding the light guide support member by bonding an upper face of the light emitting element and the second face of the light transmissive member; and forming a second light reflecting member surrounding the light emitting element by filling the space between the substrate and the light shielding frame with a second reflecting resin.
    Type: Application
    Filed: March 29, 2019
    Publication date: October 3, 2019
    Applicant: NICHIA CORPORATION
    Inventors: Kensuke YAMAOKA, Hiroki NAKAI
  • Publication number: 20190267529
    Abstract: A light emitting element includes a semiconductor layered body, an insulating film, first and second electrodes, first external connecting parts and at least one second external connecting part. The semiconductor layered body includes a first semiconductor layer, a light emitting layer, and a second semiconductor layer. The first electrode is connected to the first semiconductor layer at exposed parts through openings in the insulating film, and partially arranged on the second semiconductor layer via the insulating film. The first external connecting parts are connected to the first electrode. The first external connecting parts are spaced apart from the exposed parts in a plan view. A group comprising at least one of the first external connecting parts and other group comprising at least one of the first external connecting parts respectively surround adjacent ones of the exposed parts while being spaced apart from each other in the plan view.
    Type: Application
    Filed: February 13, 2019
    Publication date: August 29, 2019
    Inventors: Hiroki NAKAI, Kensuke YAMAOKA
  • Publication number: 20190165218
    Abstract: A light emitting device includes: a substrate; a light emitting element disposed on the substrate; a light transmissive member having a plate shape and having an upper face and a lower face disposed such that the lower face opposes a light emission face of the light emitting element; a light reflecting member covering lateral faces of the light emitting element and lateral faces of the light transmissive member; and a light shielding frame disposed on the upper face of the light reflecting member surrounding the light transmissive member. The light shielding frame has an opening, an inner perimeter of the opening is positioned at a distance apart from an outer perimeter of the upper face of the light transmissive member in a plan view as seen from above, and the light reflecting member is interposed between the inner perimeter of the opening and the outer perimeter of the upper face of the light transmissive member.
    Type: Application
    Filed: November 28, 2018
    Publication date: May 30, 2019
    Applicant: Nichia Corporation
    Inventors: Hiroki NAKAI, Kensuke YAMAOKA
  • Publication number: 20190067074
    Abstract: A semiconductor device manufacturing method includes: (A) orienting an upper surface of a semiconductor element which has the upper surface and a suction surface of a collet which has a suction hole so that the upper surface of the semiconductor device and the suction surface of the collet face each other, the upper surface including a first region and a second region, the second region lying higher than the first region; (B) bringing the suction surface of the collet into contact with a part of the second region of the semiconductor element; and (C) picking up the semiconductor element using the collet while the collet sucks in air between the first region and the suction surface via the suction hole, wherein in (B), an entirety of an uppermost surface of the second region is in contact with a region of the suction surface exclusive of the suction hole.
    Type: Application
    Filed: August 30, 2018
    Publication date: February 28, 2019
    Applicant: NICHIA CORPORATION
    Inventor: Kensuke YAMAOKA
  • Patent number: 8744207
    Abstract: Converting lightness of each pixel even for images having continuous lightness includes: setting a local area around a pixel for which lightness is converted, in the original image; setting an upper limit conversion function which continuously monotonically increases with respect to the lightness, and determines an output upper limit of lightness conversion; setting a lower limit conversion function which continuously monotonically increases with respect to the lightness, and determines an output lower limit of lightness conversion; calculating upper and lower limit values (upper and lower limit conversion function of lightness of the pixel to be converted); calculating a ratio for setting a value between the upper limit value and the lower limit value according to lightness of each pixel in the local area; and calculating converted lightness of a pixel for which the lightness is converted based on the upper limit value, the lower limit value and the ratio.
    Type: Grant
    Filed: June 27, 2012
    Date of Patent: June 3, 2014
    Assignee: Dai Nippon Printing Co., Ltd.
    Inventors: Kensuke Yamaoka, Masayuki Ikebe, Sousuke Shimoyama
  • Publication number: 20130177257
    Abstract: Converting lightness of each pixel even for images having continuous lightness includes: setting a local area around a pixel for which lightness is converted, in the original image; setting an upper limit conversion function which continuously monotonically increases with respect to the lightness, and determines an output upper limit of lightness conversion; setting a lower limit conversion function which continuously monotonically increases with respect to the lightness, and determines an output lower limit of lightness conversion; calculating upper and lower limit values (upper and lower limit conversion function of lightness of the pixel to be converted); calculating a ratio for setting a value between the upper limit value and the lower limit value according to lightness of each pixel in the local area; and calculating converted lightness of a pixel for which the lightness is converted based on the upper limit value, the lower limit value and the ratio.
    Type: Application
    Filed: June 27, 2012
    Publication date: July 11, 2013
    Applicant: DAI NIPPON PRINTING CO., LTD.
    Inventors: Kensuke YAMAOKA, Masayuki IKEBE, Sousuke SHIMOYAMA
  • Patent number: 8422815
    Abstract: In an image processing technology, an original image is inputted by accepting an input of an original image to be image-processed; a local area is set, with a pixel of which brightness is to be converted being a center of the local area, from the original image; a local histogram relating to brightness of the local area is calculated; a local cumulative histogram is calculated by accumulating the local histogram; first and second monotone increasing functions are determined, respectively, corresponding to cumulative frequency values in first and second classes of the local cumulative histogram; first and second weighting functions are determined, respectively, corresponding to the first and second monotone increasing functions; a conversion function relating to brightness of the pixel is produced from the first monotone increasing function weighted by the first weighting function and the second monotone increasing function weighted by the second weighting function; and the brightness of the pixel is then conv
    Type: Grant
    Filed: October 28, 2010
    Date of Patent: April 16, 2013
    Assignee: Dai Nippon Printing Co., Ltd.
    Inventors: Masayuki Ikebe, Sousuke Shimoyama, Kensuke Yamaoka
  • Patent number: 8159209
    Abstract: A digital signal delay measuring circuit for measuring a delay time of a digital signal of a scan-testable digital circuit inside a device to be tested is provided. The circuit includes: outputting means for outputting a delay time measuring signal as a digital signal; delay means for delaying a timing when a state of the delay time measuring signal is changed; and at least two signal holding means, each receiving the delay time measuring signal and holding the state of the delay time measuring signal at a holding-command input timing.
    Type: Grant
    Filed: May 15, 2009
    Date of Patent: April 17, 2012
    Assignee: Dai Nippon Printing Co., Ltd.
    Inventor: Kensuke Yamaoka
  • Publication number: 20110268358
    Abstract: In an image processing technology, an original image is inputted by accepting an input of an original image to be image-processed; a local area is set, with a pixel of which brightness is to be converted being a center of the local area, from the original image; a local histogram relating to brightness of the local area is calculated; a local cumulative histogram is calculated by accumulating the local histogram; first and second monotone increasing functions are determined, respectively, corresponding to cumulative frequency values in first and second classes of the local cumulative histogram; first and second weighting functions are determined, respectively, corresponding to the first and second monotone increasing functions; a conversion function relating to brightness of the pixel is produced from the first monotone increasing function weighted by the first weighting function and the second monotone increasing function weighted by the second weighting function; and the brightness of the pixel is then conv
    Type: Application
    Filed: October 28, 2010
    Publication date: November 3, 2011
    Applicant: DAI NIPPON PRINTING CO., LTD
    Inventors: Masayuki IKEBE, Sousuke SHIMOYAMA, Kensuke YAMAOKA
  • Publication number: 20090284247
    Abstract: A digital signal delay measuring circuit for measuring a delay time of a digital signal of a scan-testable digital circuit inside a device to be tested is provided. The circuit includes: outputting means for outputting a delay time measuring signal as a digital signal; delay means for delaying a timing when a state of the delay time measuring signal is changed; and at least two signal holding means, each receiving the delay time measuring signal and holding the state of the delay time measuring signal at a holding-command input timing. The holding-command input timing is identical between the at least two signal holding means, the timing when the state of the delay time measuring signal input to each of the signal holding means is changed is different depending on the delay means, and the delay time is obtained based on a difference in the state of the delay time measuring signal held by each of the signal holding means.
    Type: Application
    Filed: May 15, 2009
    Publication date: November 19, 2009
    Applicant: DAI NIPPON PRINTING CO., LTD.
    Inventor: Kensuke Yamaoka
  • Patent number: 5357584
    Abstract: An image evaluation circuit is connected to an image compression circuit and an image extension circuit. In the image evaluation circuit, original image data and extended image data reproduced from compressed image data are compared in each block pixel by pixel to generate block noise. The comparison is carried out twice to provide two block noises by two compression factors, and an optimum compression factor is determined in accordance with the two compression factors and the two block noises.
    Type: Grant
    Filed: February 1, 1993
    Date of Patent: October 18, 1994
    Assignee: Hudson Soft Co., Ltd.
    Inventor: Kensuke Yamaoka