Abstract: A clamping MOS transistor-based overvoltage protection circuit is provided for a bidirectional transmission gate FET coupled between input and output ports. When the voltage applied to the input port exceeds the supply voltage by a MOS gate threshold, the clamping MOS transistor is turned on, pulling the voltage applied to the gate of the transmission gate FET very close to the applied overvoltage level by a voltage differential less than a diode drop. This reduction in Vgs of the transmission gate FET reduces its source-to-drain current, as the device operates deeper in a sub-threshold region, increasing the overvoltage rating for the same leakage current specification. In a second embodiment, a clamping MOS device is coupled on either side of the source-drain path of the transmission gate's FET device.

Abstract: A circuit architecture provides overvoltage protection for a bidirectional transmission gate of complementary polarity field effect transistors. In a first embodiment, a single auxiliary clamping MOS device is coupled in circuit with the input path, as long as there is a defined output and only the input is subject to the possibility of an overvoltage condition. When the voltage applied to the input port exceeds the supply voltage by the MOS gate threshold, the auxiliary clamping MOS transistor is turned on, pulling the voltage applied to the gate of the transmission gate FET very close to the applied overvoltage level by a voltage differential that is less than a diode drop. This reduction in Vgs of the transmission gate MOSFET reduces its source-to-drain current, as the MOS device operates deeper in a sub-threshold region, increasing the overvoltage rating for the same leakage current specification.