Abstract: A pulse laser test system including a conditioning pulse circuit, a probe pulse circuit, a pulse laser, a trigger mode controller, and a laser pulse modulator. The conditioning pulse circuit provides asynchronous conditioning trigger pulses at a selected rate. The probe pulse circuit provides a synchronized probe trigger pulse. The trigger mode controller selects the probe pulse circuit while the synchronized probe trigger pulse is provided causing the pulse laser to provide a synchronized probe laser pulse, and otherwise selects the output of the conditioning pulse circuit causing the pulse laser to provide asynchronous conditioning laser pulses. The laser pulse modulator has an optical input coupled to the laser output of the pulse laser, has a gating input receiving a gate signal from the trigger mode controller, and has an optical output that provides laser pulses passed from the pulse laser while the gate signal is asserted.

Abstract: A method of time resolved radiation assisted device alteration testing of a semiconductor circuit which includes performing spatially resolved radiation assisted circuit testing on the semiconductor circuit while applying a test pattern to determine a pass-fail modulation location, asynchronously scanning the semiconductor circuit with radiation while repeatedly applying the test pattern and providing pass-fail results, combining corresponding pass-fail results provided during the asynchronously scanning to determine a shifted pass-fail modulation indication, determining time shift information between the pass-fail modulation location and the shifted pass-fail modulation indication, and identifying at least one of the test vectors based on the time shift information. The radiation may be a continuous wave laser beam.

Abstract: A method of locating a defect of a failed semiconductor device which includes applying a test pattern to the failed semiconductor device and providing failed semiconductor device test responses as a pass signature, applying radiation to each of multiple locations of circuitry of a correlation semiconductor device with sufficient energy to induce a fault in the circuitry, applying the test pattern to the correlation semiconductor device while the radiation is applied to the location and comparing correlation semiconductor device test responses with the pass signature for each location, and determining a defect location of the failed semiconductor device in which correlation semiconductor device test responses at least nearly match the pass signature. The radiation may be a laser beam. The method may include determining an exact match or a near match based on a high correlation result. Asynchronous scanning may be used to provide timing information.

Abstract: A method of locating a defect of a failed semiconductor device which includes applying a test pattern to the failed semiconductor device and providing failed semiconductor device test responses as a pass signature, applying radiation to each of multiple locations of circuitry of a correlation semiconductor device with sufficient energy to induce a fault in the circuitry, applying the test pattern to the correlation semiconductor device while the radiation is applied to the location and comparing correlation semiconductor device test responses with the pass signature for each location, and determining a defect location of the failed semiconductor device in which correlation semiconductor device test responses at least nearly match the pass signature. The radiation may be a laser beam. The method may include determining an exact match or a near match based on a high correlation result. Asynchronous scanning may be used to provide timing information.

Abstract: A method of time resolved radiation assisted device alteration testing of a semiconductor circuit which includes performing spatially resolved radiation assisted circuit testing on the semiconductor circuit while applying a test pattern to determine a pass-fail modulation location, asynchronously scanning the semiconductor circuit with radiation while repeatedly applying the test pattern and providing pass-fail results, combining corresponding pass-fail results provided during the asynchronously scanning to determine a shifted pass-fail modulation indication, determining time shift information between the pass-fail modulation location and the shifted pass-fail modulation indication, and identifying at least one of the test vectors based on the time shift information. The radiation may be a continuous wave laser beam.

Abstract: A method for testing a semiconductor device includes irradiating a transistor within the semiconductor device with a light beam, where the irradiating the transistor induces a current within the transistor, and, in response to the irradiating, detecting photon emission from the transistor. A semiconductor device testing system includes a light beam emitter which provides a light beam to a device under test (DUT) to induce a current in the DUT, a filter which receives a photon emission from the DUT and removes from the photon emission a reflected light beam that is reflected from the DUT to provide a filtered photon emission, and a photon detector which detects the filtered photon emission.

Abstract: Amplitude modulated optical beam induced current (AMOBIC) created by irradiating an internal PN junction of an integrated circuit (IC) (20) is used to determine a voltage level of the internal PN junction. In one embodiment, an IC (20) requiring high current and operating above the kilo-Hertz frequency range is monitored using a pulsed infrared laser beam (42). An AMOBIC signal is created when an internal PN junction is irradiated with the pulsed infrared laser beam (42). By using a pulsed infrared laser beam (42) an OBIC signal is amplitude modulated (AM) to a carrier frequency. This carrier frequency is selected so that the AMOBIC signal is large when compared to the various noise sources present at or near the carrier frequency. The noise rejection resulting from frequency shifting of the OBIC perturbation is further increased by selectively attenuating transient current spikes occurring at IC clock edges, whereby IC testing is further improved.