Patents by Inventor Kent D. Layton
Kent D. Layton has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10141734Abstract: Aspects of an electrical safety device that provides detection of miswiring of line and load connection pairs are presented. In an example, the device includes a differential current detector through which are routed a live current path and a neutral current path coupling the line and load connection pairs. The device also includes a selectable conducting path that, when selected, circumvents the differential current detector while coupling one of a line live connection to a load live connection or a line neutral connection to a load neutral connection of the connection pairs. The device further includes a control circuit that determines, via the differential current detector, while the conducting path is selected, a differential current defined by a difference in currents on the live and neutral current paths, and interrupts at least one of the live and neutral current paths in response to the differential current not exceeding a threshold value.Type: GrantFiled: September 10, 2015Date of Patent: November 27, 2018Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Riley D. Beck, Kent D. Layton, Scott R. Grange, Rishi Pratap Singh
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Patent number: 9897636Abstract: A single wound single current transformer impedance measurement circuit for determining a circuit element parameter in a ground fault circuit interrupter circuit. The circuit includes a transconductance amplifier having first and second input terminals and first and second output terminals. In an embodiment, a first detector has input terminal coupled to the first output terminal of the transconductance amplifier and another input terminal coupled for receiving a first electrical signal. A second detector has a terminal coupled to the second output terminal of the transconductance amplifier and an input terminal coupled for receiving the first electrical signal. Alternatively, the second detector has an input terminal coupled to the first output terminal of the transconductance amplifier and another input terminal coupled for receiving the first electrical signal.Type: GrantFiled: April 26, 2016Date of Patent: February 20, 2018Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Riley D. Beck, Kent D. Layton, Matthew A. Tyler, Scott R. Grange
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Patent number: 9680421Abstract: A method and circuit for dynamically correcting offsets associated with an AC power system. In an embodiment, a first offset current generated in response to a ground to neutral fault stimulus is decreased and a second offset current generated in response to a differential fault stimulus is decreased. In another embodiment, the circuit includes an offset correction circuit that has one of a chopper circuit or an auto-zeroing circuit. An amplifier is connected to the offset correction circuit and an output connected to the offset correction circuit. A signal generator is switchably coupled to a first input of the offset correction circuit and a bias generator is switchably coupled to the first input of the offset correction circuit.Type: GrantFiled: April 19, 2016Date of Patent: June 13, 2017Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Riley D. Beck, Kent D. Layton
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Patent number: 9645192Abstract: A ground fault interrupter circuit and a method for operating a ground fault interrupter that includes configuring the ground fault interrupter to perform a plurality of self tests. The ground fault interrupter may be configured to perform a ground fault self test, a grounded-neutral self test, and a trip circuit self test.Type: GrantFiled: March 14, 2013Date of Patent: May 9, 2017Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Riley D. Beck, Kent D. Layton, Scott R. Grange
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Publication number: 20160238644Abstract: A single wound single current transformer impedance measurement circuit for determining a circuit element parameter in a ground fault circuit interrupter circuit. The circuit includes a transconductance amplifier having first and second input terminals and first and second output terminals. In an embodiment, a first detector has input terminal coupled to the first output terminal of the transconductance amplifier and another input terminal coupled for receiving a first electrical signal. A second detector has a terminal coupled to the second output terminal of the transconductance amplifier and an input terminal coupled for receiving the first electrical signal. Alternatively, the second detector has an input terminal coupled to the first output terminal of the transconductance amplifier and another input terminal coupled for receiving the first electrical signal.Type: ApplicationFiled: April 26, 2016Publication date: August 18, 2016Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Riley D. Beck, Kent D. Layton, Matthew A. Tyler, Scott R. Grange
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Patent number: 9330875Abstract: A method for determining a circuit element parameter in a ground fault circuit interrupter circuit. An electrical signal provided to a first node is used to generate another electrical signal at a second node. The electrical signal at the second node is multiplexed with a modulation signal to generate a modulated signal that is then filtered and converted into a digital representation of a portion of the circuit element parameter. The electrical signal at the second node is multiplexed with the modulation signal after it has been phase shifted to produce a modulated signal that is filter and converted into a digital representation of another portion of the circuit element parameter. In another aspect, a slope based solenoid self-test method is used for self-testing in a GFCI circuit. Alternatively, a method for determining a wiring fault is provided using a digital filter.Type: GrantFiled: January 29, 2013Date of Patent: May 3, 2016Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Riley D. Beck, Kent D. Layton, Matthew A. Tyler, Scott R. Grange
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Patent number: 9329216Abstract: A method and circuit for determining a circuit element parameter in a ground fault circuit interrupter circuit. An electrical signal provided to a first node is used to generate another electrical signal at a second node. The electrical signal at the second node is multiplexed with a modulation signal to generate a modulated signal that is then filtered and converted into a digital representation of a portion of the circuit element parameter. The electrical signal at the second node is multiplexed with the modulation signal after it has been phase shifted to produce a modulated signal that is filter and converted into a digital representation of another portion of the circuit element parameter. In another aspect, a slope based solenoid self-test method is used for self-testing in a GFCI circuit. Alternatively, a method for determining a wiring fault is provided using a digital filter.Type: GrantFiled: January 29, 2013Date of Patent: May 3, 2016Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Riley D. Beck, Kent D. Layton, Matthew A. Tyler, Scott R. Grange
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Patent number: 9331469Abstract: A method and circuit for determining a circuit element parameter in a ground fault circuit interrupter circuit. An electrical signal provided to a first node is used to generate another electrical signal at a second node. The electrical signal at the second node is multiplexed with a modulation signal to generate a modulated signal that is then filtered and converted into a digital representation of a portion of the circuit element parameter. The electrical signal at the second node is multiplexed with the modulation signal after it has been phase shifted to produce a modulated signal that is filter and converted into a digital representation of another portion of the circuit element parameter. In another aspect, a slope based solenoid self-test method is used for self-testing in a GFCI circuit. Alternatively, a method for determining a wiring fault is provided using a digital filter.Type: GrantFiled: March 14, 2013Date of Patent: May 3, 2016Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Riley D. Beck, Kent D. Layton
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Publication number: 20160118785Abstract: Aspects of an electrical safety device that provides detection of miswiring of line and load connection pairs are presented. In an example, the device includes a differential current detector through which are routed a live current path and a neutral current path coupling the line and load connection pairs. The device also includes a selectable conducting path that, when selected, circumvents the differential current detector while coupling one of a line live connection to a load live connection or a line neutral connection to a load neutral connection of the connection pairs. The device further includes a control circuit that determines, via the differential current detector, while the conducting path is selected, a differential current defined by a difference in currents on the live and neutral current paths, and interrupts at least one of the live and neutral current paths in response to the differential current not exceeding a threshold value.Type: ApplicationFiled: September 10, 2015Publication date: April 28, 2016Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Riley D. BECK, Kent D. LAYTON, Scott R. GRANGE, Rishi Pratap SINGH
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Patent number: 9124094Abstract: A method and circuit for detecting and clamping current in a ground fault circuit interrupter circuit. In accordance with an embodiment the circuit includes an amplifier connected to a switch, where in the amplifier has an input connected to a first conduction terminal of the switch through a resistor and another input connected to a second conduction terminal of the switch. An output of the amplifier is connected to a control terminal of the switch. The circuit may include a ground fault circuit interrupter engine having an input connected to the first conduction terminal of the switch and another second input connected to the second conduction terminal of the switch.Type: GrantFiled: March 14, 2013Date of Patent: September 1, 2015Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Riley D. Beck, Kent D. Layton
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Publication number: 20140266272Abstract: A ground fault interrupter circuit and a method for operating a ground fault interrupter that includes configuring the ground fault interrupter to perform a plurality of self tests. The ground fault interrupter may be configured to perform a ground fault self test, a grounded-neutral self test, and a trip circuit self test.Type: ApplicationFiled: March 14, 2013Publication date: September 18, 2014Applicant: Semiconductor Components Industries, LLCInventors: Riley D. Beck, Kent D. Layton, Scott R. Grange
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Publication number: 20140268435Abstract: A method and circuit for detecting and clamping current in a ground fault circuit interrupter circuit. In accordance with an embodiment the circuit includes an amplifier connected to a switch, where in the amplifier has an input connected to a first conduction terminal of the switch through a resistor and another input connected to a second conduction terminal of the switch. An output of the amplifier is connected to a control terminal of the switch. The circuit may include a ground fault circuit interrupter engine having an input connected to the first conduction terminal of the switch and another second input connected to the second conduction terminal of the switch.Type: ApplicationFiled: March 14, 2013Publication date: September 18, 2014Applicant: Semiconductor Components Industries, LLCInventors: Riley D. Beck, Kent D. Layton
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Publication number: 20140210484Abstract: A method for determining a circuit element parameter in a ground fault circuit interrupter circuit. An electrical signal provided to a first node is used to generate another electrical signal at a second node. The electrical signal at the second node is multiplexed with a modulation signal to generate a modulated signal that is then filtered and converted into a digital representation of a portion of the circuit element parameter. The electrical signal at the second node is multiplexed with the modulation signal after it has been phase shifted to produce a modulated signal that is filter and converted into a digital representation of another portion of the circuit element parameter. In another aspect, a slope based solenoid self-test method is used for self-testing in a GFCI circuit. Alternatively, a method for determining a wiring fault is provided using a digital filter.Type: ApplicationFiled: January 29, 2013Publication date: July 31, 2014Inventors: Riley D. Beck, Kent D. Layton, Matthew A. Tyler, Scott R. Grange
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Publication number: 20130215537Abstract: A method and circuit for determining a circuit element parameter in a ground fault circuit interrupter circuit. An electrical signal provided to a first node is used to generate another electrical signal at a second node. The electrical signal at the second node is multiplexed with a modulation signal to generate a modulated signal that is then filtered and converted into a digital representation of a portion of the circuit element parameter. The electrical signal at the second node is multiplexed with the modulation signal after it has been phase shifted to produce a modulated signal that is filter and converted into a digital representation of another portion of the circuit element parameter. In another aspect, a slope based solenoid self-test method is used for self-testing in a GFCI circuit. Alternatively, a method for determining a wiring fault is provided using a digital filter.Type: ApplicationFiled: March 14, 2013Publication date: August 22, 2013Applicant: Semiconductor Components Industries, LLCInventors: Riley D. Beck, Kent D. Layton
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Publication number: 20130214800Abstract: A method and circuit for determining a circuit element parameter in a ground fault circuit interrupter circuit. An electrical signal provided to a first node is used to generate another electrical signal at a second node. The electrical signal at the second node is multiplexed with a modulation signal to generate a modulated signal that is then filtered and converted into a digital representation of a portion of the circuit element parameter. The electrical signal at the second node is multiplexed with the modulation signal after it has been phase shifted to produce a modulated signal that is filter and converted into a digital representation of another portion of the circuit element parameter. In another aspect, a slope based solenoid self-test method is used for self-testing in a GFCI circuit. Alternatively, a method for determining a wiring fault is provided using a digital filter.Type: ApplicationFiled: January 29, 2013Publication date: August 22, 2013Inventors: Riley D. Beck, Kent D. Layton, Matthew A. Tyler, Scott R. Grange
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Patent number: 8390297Abstract: A method and circuit for determining a circuit element parameter in a ground fault circuit interrupter circuit. An electrical signal provided to a first node is used to generate another electrical signal at a second node. The electrical signal at the second node is multiplexed with a modulation signal to generate a modulated signal that is then filtered and converted into a digital representation of a portion of the circuit element parameter. The electrical signal at the second node is multiplexed with the modulation signal after it has been phase shifted to produce a modulated signal that is filter and converted into a digital representation of another portion of the circuit element parameter. In another aspect, a slope based solenoid self-test method is used for self-testing in a GFCI circuit. Alternatively, a method for determining a wiring fault is provided using a digital filter.Type: GrantFiled: October 2, 2009Date of Patent: March 5, 2013Assignee: Semiconductor Components Industries, LLCInventors: Riley D. Beck, Kent D. Layton, Matthew A. Tyler, Scott R. Grange
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Publication number: 20110080177Abstract: A method and circuit for determining a circuit element parameter in a ground fault circuit interrupter circuit. An electrical signal provided to a first node is used to generate another electrical signal at a second node. The electrical signal at the second node is multiplexed with a modulation signal to generate a modulated signal that is then filtered and converted into a digital representation of a portion of the circuit element parameter. The electrical signal at the second node is multiplexed with the modulation signal after it has been phase shifted to produce a modulated signal that is filter and converted into a digital representation of another portion of the circuit element parameter. In another aspect, a slope based solenoid self-test method is used for self-testing in a GFCI circuit. Alternatively, a method for determining a wiring fault is provided using a digital filter.Type: ApplicationFiled: October 2, 2009Publication date: April 7, 2011Inventors: Riley D. Beck, Kent D. Layton, Matthew A. Tyler, Scott R. Grange
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Patent number: 6946828Abstract: A current measurement circuit that measures current passing through two loads. The circuit includes a differential output transconductance amplifier. One current output terminal pf the amplifier receives the current from the first load with the first voltage input terminal coupled to that current output terminal. The second current output terminal provides a current to the second load with the second voltage input terminal coupled to the second current output terminal with the current provided at the second output terminal being approximately equal to the current received at the first current output terminal. The transconductance amplifier provides a copy current on the third current output terminal this is approximately equal to at least one of the other output currents. That copy current is then directly measured, rather than the actual current passing through the loads.Type: GrantFiled: May 20, 2003Date of Patent: September 20, 2005Assignee: AMI Semiconductor, Inc.Inventor: Kent D. Layton
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Patent number: 6768371Abstract: A programmable voltage reference circuit that includes a current-to-voltage converter circuit, a voltage-to-current converter circuit, and a floating gate. The current-to-voltage converter circuit has two current input terminals and a voltage output terminal. The voltage-to-current converter circuit has two voltage input terminals and two current output terminals. The two current output terminals are each coupled to a corresponding current input terminal of the current-to-voltage converter circuit. A floating gate device has one terminal coupled to a fixed voltage supply, and one terminal coupled to an input terminal of the voltage-to-current converter. The other input terminal of the voltage-to-current converter is coupled to the voltage reference output terminal of the programmable voltage reference circuit. Also, the voltage output terminal of the current-to-voltage converter circuit is coupled to the negative voltage input terminal of the voltage-to-current input circuit.Type: GrantFiled: March 20, 2003Date of Patent: July 27, 2004Assignee: AMI Semiconductor, Inc.Inventors: Kent D. Layton, Seth A. Cook