Abstract: A digital noise coupling circuit includes: an analog-to-digital converter (ADC) configured to convert a quantization error, generated in a process of converting a first analog signal into a first digital signal, into a first digital error signal; a delay cell comprising delay elements configured to delay a transmission of the first digital error signal based on a clock signal; and a digital-to-analog (DA) conversion circuit configured to perform, in an analog domain, noise shaping on the first digital error signal that is delayed and transmitted from the delay cell.

Abstract: A continuous time op-amp includes a differential op-amp configured to produce, and output through output lines, output signals amplified based on a difference between input signals inputted to the differential op-amp, and a common mode feedback (CMFB) circuit configured to feed a common mode voltage back to the op-amp through a feedback line in continuous time through a capacitive coupled path, wherein the CMFB circuit includes: feedback capacitors connected between the output lines and the feedback line; switched capacitors charged based on a common mode reference voltage; and switching elements configured to control a connection between the feedback capacitors and the switched capacitors.

Abstract: An amplification apparatus includes an amplifier having an inverting terminal, and a non-inverting terminal connected to a reset voltage node, a first capacitor connected to the inverting terminal, an input voltage being applied to the first capacitor, a second capacitor connected to the inverting terminal and an output terminal of the amplifier, and a duty-cycled resistor, connected in parallel to the second capacitor, including a first resistor. The duty-cycled resistor is configured to connect the first resistor and the inverting terminal and to disconnect the first resistor and the reset voltage node during a first time interval included in a period to complete an on-and-off cycle of the duty-cycled resistor, and disconnect the first resistor and the inverting terminal and to connect the first resistor and the reset voltage node during a second time interval included in the period.

Abstract: An amplification apparatus includes an amplifier having an inverting terminal, and a non-inverting terminal connected to a reset voltage node, a first capacitor connected to the inverting terminal, an input voltage being applied to the first capacitor, a second capacitor connected to the inverting terminal and an output terminal of the amplifier, and a duty-cycled resistor, connected in parallel to the second capacitor, including a first resistor. The duty-cycled resistor is configured to connect the first resistor and the inverting terminal and to disconnect the first resistor and the reset voltage node during a first time interval included in a period to complete an on-and-off cycle of the duty-cycled resistor, and disconnect the first resistor and the inverting terminal and to connect the first resistor and the reset voltage node during a second time interval included in the period.