Abstract: Embodiments are provided for centralized control of execution of a quantum program. In some embodiments, a system can include a processor that executes computer-executable components stored in memory. The computer-executable components include a synchronization component that causes multiple controller devices remotely located relative to the system to be synchronized with one another and the system. The computer-executable components also include an ingestion component that accesses measurement data resulting from one or more measurements at respective qubit devices. The computer-executable components further include a composition component that generates, using the measurement data, one or more control messages for respective second controller devices of the multiple controller devices.

Abstract: Embodiments are provided for centralized control of execution of a quantum program. In some embodiments, a system can include a processor that executes computer-executable components stored in memory. The computer-executable components include a synchronization component that causes multiple controller devices remotely located relative to the system to be synchronized with one another and the system. The computer-executable components also include an ingestion component that accesses measurement data resulting from one or more measurements at respective qubit devices. The computer-executable components further include a composition component that generates, using the measurement data, one or more control messages for respective second controller devices of the multiple controller devices.

Abstract: A method for providing a computer system including: a trivial file transfer protocol (TFTP) server computer, a system management controller computer and a set of subnet(s) including a first subnet, with each subnet of the set of subnet(s) including a primary computer and a plurality of host computers that respectively include a field programmable gate array (FPGA) with programmable blocks, polling, by the system management controller, each computer of the first subnet to determine that all of the computers of the first subnet are ready to receive a broadcast of an FPGA image, instructing the TFTP server computer to send the FPGA image to all of the machines of the first subnet; and sending, by the TFTP server computer and to all of the computers of the first subnet, the FPGA image.

Abstract: Method, apparatus and computer program product for spur detection in a sampled waveform in a mixed analog/digital system using the phase of the frequency response comprising acquiring a sample waveform including a set of discrete uniformly spaced samples from a target system, wherein the sample waveform is a time domain vector; applying FFT transforming the time domain vector into the frequency domain; analyzing the frequency domain response including calculating the phase response; and determining whether the sample waveform has spurs including comparing the phase response to a clean phase profile including determining that the phase response having a phase profile value outside a phase deviation tolerance has one or more spurs and determining that the phase response having a phase profile value inside the phase deviation tolerance has no spurs, wherein a spur indicates unaligned data having a delayed bit flip.

Abstract: Method, apparatus and computer program product for spur detection in a sampled waveform in a mixed analog/digital system using the magnitude of the frequency response comprising acquiring a sample waveform including a set of discrete uniformly spaced samples from a target system, wherein the sample waveform is a time domain vector; applying FFT transforming the time domain vector into the frequency domain; analyzing the frequency domain response including calculating the magnitude response; and determining whether the sample waveform has spurs including comparing the magnitude response to an average noise floor threshold including determining that the magnitude response having an average noise floor value above the average noise floor threshold has one or more spurs and determining that the magnitude response having an average noise floor value below the average noise floor threshold has no spurs, wherein a spur indicates unaligned data having a delayed bit flip.

Abstract: In a first aspect, a first method is provided for self-adjusting allocation of memory bandwidth in a network processor system. The first method includes the steps of (1) determining an amount of memory bandwidth of a network processor used by each of a plurality of data types; and (2) dynamically adjusting the amount of memory bandwidth allocated to at least one of the plurality of data types based on the determination. Numerous other aspects are provided.

Abstract: A method and elastic buffer circuit are provided for implementing low power, single master-slave elastic buffers in a network chip design to provide a continuous stream of data to multiple sinks from multiple sources, and a design structure on which the subject circuit resides. An elastic buffer only uses a single master-slave register. The circuit includes a finite state machine, and a latch control block (LCB) to implement the single master-slave elastic buffer removing all ½ cycle paths between buffer locations enabling usage of the single master-slave register.

Abstract: A memory control apparatus includes a data stream format converter and a physical layer converter. The data stream format converter is configured to convert an incoming data stream that has a data stream format corresponding to a first memory type into a format-converted data stream that has a data stream format corresponding to a second memory type. The second memory type is different from the first memory type. The physical layer converter is configured to convert the format-converted data stream into a physical-layer-converted data stream that has at least one physical parameter corresponding to the second memory type. The format-converted data stream has at least one physical parameter corresponding to the first memory type.