Abstract: Various embodiments of the present disclosure provide techniques for enabling a user to efficiently design a programmable logic device (PLD) capable of partial reconfiguration. In some implementations, a processor is configured to run a system level design tool and accepts, as inputs from a user, an identification of at least two personas to be used within a reconfigurable region of the PLD. The design tool defines one or more boundaries of a partial reconfig (PR) domain, the PR domain including a partitioned reconfigurable region of the PLD that is selectably configurable as any of the at least two personas. In some implementations, the PR domain includes at least one IP component configured to safely shut down at least one signal, the at least one signal originating from or directed toward an element of the PLD outside of the PR domain.

Abstract: Systems and methods for implementing tristate signaling are described. The systems include an integrated circuit that further includes a tristate system. The tristate system converts an encapsulated unidirectional signal into a tristate signal. A relation between multiple unidirectional signals and the tristate signal is established by encapsulating the unidirectional signals to represent the tristate signal. The establishment of the relation facilitates control of the tristate signal by controlling the encapsulated unidirectional signals.

Abstract: Methods and apparatus are provided for allowing components such as buffers, multiplexers, ingress cores, etc. on a device such as a programmable chip to configure themselves based on parameter information. In some examples, self-configuring components obtain parameter information from adjacent components. In other examples, self-configuring components obtain parameter information from a system environment or a processor register. Component self-configuration can occur at a variety of times including preprocessing, simulation, and run-time.

Abstract: Systems and methods for generating and using a test environment and a test system surrounding a design are described. The systems and methods may involve using a same application software for creating a design and for receiving a selection to generate the test environment and the test system. In response to receiving the selection, the systems and methods may execute a verification tool to create the test environment and test system. Moreover, a user may not fill in templates of components of the verification tool. The verification tool is integrated within the application software.

Abstract: Methods and apparatus are provided for allowing components such as buffers, multiplexers, ingress cores, etc. on a device such as a programmable chip to configure themselves based on parameter information. In some examples, self-configuring components obtain parameter information from adjacent components. In other examples, self-configuring components obtain parameter information from a system environment or a processor register. Component self-configuration can occur at a variety of times including preprocessing, simulation, and run-time.

Abstract: A programmable logic device includes a hard-logic portion that selectively aggregates bandwidth of data ports and maps logically and physically the transactions from these ports. The memory interface structure is a part of a hard-logic portion that includes random access memories (RAMs), multiplexers, and pointers that allow static or dynamic bandwidth configuration as function of instruments examining the system traffic using queues. The interface allows many initiators having many logical threads to share and use many physical threads in different queue modules.

Abstract: Methods and apparatus are provided for allowing flexible on-chip datapath interfaces on a device. Datapath connections allow data streamlining without any knowledge of channels or packet boundaries. Flexible and modular interface adapters are used to allow component designers to efficiently provide interoperable components without having to adhere to a strict datapath interface specification. Interface adapters from an adapter library are instantiated and configured automatically when two components are connected.

Abstract: A packet format converter (PFC) that can be programmed to perform any one of a multiple number of different packet format conversions is described. According to one embodiment, the PFC includes a pattern state machine and a pattern memory coupled to the pattern state machine. The pattern memory stores pattern memory data including pointer information. The pointer information is either for writing data to be input into the PFC or reading data to be output by the PFC. The pattern state machine is programmed based on the pattern memory data. Also in one embodiment, the PFC further includes a backpressure control for issuing ready and valid signals for the PFC, wherein the ready signal indicates whether the PFC is ready to accept input data and the valid signal indicates whether the PFC has valid data to output.

Abstract: Methods and apparatus are provided for allowing flexible on-chip datapath interfaces on a device. Datapath connections allow data streamlining without any knowledge of channels or packet boundaries. Flexible and modular interface adapters are used to allow component designers to efficiently provide interoperable components without having to adhere to a strict datapath interface specification. Interface adapters from an adapter library are instantiated and configured automatically when two components are connected.

Abstract: A system for designing an integrated circuit is provided. The system includes a plurality of class databases having register information extracted from a register entry tool. A system integration tool is used to integrate the register information from each of the class databases into a system database. The system integration tool essentially consolidates the class databases and maintains a base address for the various components. A system application module includes a number of application tools, which may be referred to as generators. The application tools include, among other tools, a document generator tool, a hardware description language (HDL) generator, a hardware abstraction layer (HAL) generator, and a test framework. A method of designing a circuit is also provided.

Abstract: Methods and apparatus are provided for allowing components such as buffers, multiplexers, ingress cores, etc. on a device such as a programmable chip to configure themselves based on parameter information. In some examples, self-configuring components obtain parameter information from adjacent components. In other examples, self-configuring components obtain parameter information from a system environment or a processor register. Component self-configuration can occur at a variety of times including preprocessing, simulation, and run-time.