Patents by Inventor Kent Prosch

Kent Prosch has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220075649
    Abstract: Methods, non-transitory machine-readable media, and computing devices for transitioning tasks and interrupt service routines are provided. An example method includes processing, by a plurality of processor cores of a storage controller, tasks and interrupt service routines. A performance statistic is determined corresponding to the plurality of processor cores. Based on detecting that the performance statistic passes a threshold, a number of the plurality of processor cores that are assigned to the tasks and the interrupt service routines are reduced.
    Type: Application
    Filed: November 19, 2021
    Publication date: March 10, 2022
    Inventors: Kent Prosch, Matthew Weber, Arindam Banerjee, Ben McDavitt
  • Patent number: 11182202
    Abstract: Methods, non-transitory machine-readable media, and computing devices for transitioning tasks and interrupt service routines are provided. An example method includes processing, by a plurality of processor cores of a storage controller, tasks and interrupt service routines. A performance statistic is determined corresponding to the plurality of processor cores. Based on detecting that the performance statistic passes a threshold, a number of the plurality of processor cores that are assigned to the tasks and the interrupt service routines are reduced.
    Type: Grant
    Filed: October 15, 2019
    Date of Patent: November 23, 2021
    Assignee: NETAPP, INC.
    Inventors: Kent Prosch, Matthew Weber, Arindam Banerjee, Ben McDavitt
  • Publication number: 20200042347
    Abstract: Methods, non-transitory machine-readable media, and computing devices for transitioning tasks and interrupt service routines are provided. An example method includes processing, by a plurality of processor cores of a storage controller, tasks and interrupt service routines. A performance statistic is determined corresponding to the plurality of processor cores. Based on detecting that the performance statistic passes a threshold, a number of the plurality of processor cores that are assigned to the tasks and the interrupt service routines are reduced.
    Type: Application
    Filed: October 15, 2019
    Publication date: February 6, 2020
    Inventors: Kent Prosch, Matthew Weber, Arindam Banerjee, Ben McDavitt
  • Patent number: 10459759
    Abstract: Methods, non-transitory machine-readable media, and computing devices for transitioning tasks and interrupt service routines are provided. An example method includes processing, by a plurality of processor cores of a storage controller, tasks and interrupt service routines. A performance statistic is determined corresponding to the plurality of processor cores. Based on detecting that the performance statistic passes a threshold, a number of the plurality of processor cores that are assigned to the tasks and the interrupt service routines are reduced.
    Type: Grant
    Filed: February 7, 2018
    Date of Patent: October 29, 2019
    Assignee: NETAPP, INC.
    Inventors: Kent Prosch, Matthew Weber, Arindam Banerjee, Ben McDavitt
  • Publication number: 20180165120
    Abstract: Methods, non-transitory machine-readable media, and computing devices for transitioning tasks and interrupt service routines are provided. An example method includes processing, by a plurality of processor cores of a storage controller, tasks and interrupt service routines. A performance statistic is determined corresponding to the plurality of processor cores. Based on detecting that the performance statistic passes a threshold, a number of the plurality of processor cores that are assigned to the tasks and the interrupt service routines are reduced.
    Type: Application
    Filed: February 7, 2018
    Publication date: June 14, 2018
    Inventors: Kent Prosch, Matthew Weber, Arindam Banerjee, Ben McDavitt
  • Patent number: 9910700
    Abstract: A method for migration of operations between CPU cores, the method includes: processing, by a source core, one or more tasks and one or more interrupt service routines; accessing a mapping corresponding to a task of the one or more tasks and an interrupt service routine of the one or more interrupt service routines; identifying, based on the mapping, a target core that corresponds to the task and the interrupt service routine; blocking the task from being processed by the source core in response to identifying the target core; in response to identifying the target core, disabling an interrupt corresponding to the interrupt service routine; in response to identifying the target core, assigning the task and the interrupt to the target core; after assigning the interrupt to the target core, enabling the interrupt; and after assigning the task to the target core, processing the task by the target core.
    Type: Grant
    Filed: August 26, 2015
    Date of Patent: March 6, 2018
    Assignee: NetApp, Inc.
    Inventors: Kent Prosch, Matthew Weber, Arindam Banerjee, Ben McDavitt
  • Publication number: 20170060624
    Abstract: A method for migration of operations between CPU cores, the method includes: processing, by a source core, one or more tasks and one or more interrupt service routines; accessing a mapping corresponding to a task of the one or more tasks and an interrupt service routine of the one or more interrupt service routines; identifying, based on the mapping, a target core that corresponds to the task and the interrupt service routine; blocking the task from being processed by the source core in response to identifying the target core; in response to identifying the target core, disabling an interrupt corresponding to the interrupt service routine; in response to identifying the target core, assigning the task and the interrupt to the target core; after assigning the interrupt to the target core, enabling the interrupt; and after assigning the task to the target core, processing the task by the target core.
    Type: Application
    Filed: August 26, 2015
    Publication date: March 2, 2017
    Inventors: Kent Prosch, Matthew Weber, Arindam Banerjee, Ben McDavitt
  • Patent number: 9304937
    Abstract: Atomic write operations for storage devices are implemented by maintaining the data that would be overwritten in the cache until the write operation completes. After the write operation completes, including generating any related metadata, a checkpoint is created. After the checkpoint is created, the old data is discarded and the new data becomes the current data for the affected storage locations. If an interruption occurs prior to the creation of the checkpoint, the old data is recovered and any new is discarded. If an interruption occurs after the creation of the checkpoint, any remaining old data is discarded and the new data becomes the current data. Write logs that indicate the locations affected by in progress write operation are used in some implementations. If neither all of the new data nor all of the old data is recoverable, a predetermined pattern can be written into the affected locations.
    Type: Grant
    Filed: January 24, 2014
    Date of Patent: April 5, 2016
    Assignee: NetApp Inc.
    Inventors: Greg William Achilles, Gordon Hulpieu, Donald Roman Humlicek, Martin Oree Parrish, Kent Prosch, Alan Stewart
  • Publication number: 20150113224
    Abstract: Atomic write operations for storage devices are implemented by maintaining the data that would be overwritten in the cache until the write operation completes. After the write operation completes, including generating any related metadata, a checkpoint is created. After the checkpoint is created, the old data is discarded and the new data becomes the current data for the affected storage locations. If an interruption occurs prior to the creation of the checkpoint, the old data is recovered and any new is discarded. If an interruption occurs after the creation of the checkpoint, any remaining old data is discarded and the new data becomes the current data. Write logs that indicate the locations affected by in progress write operation are used in some implementations. If neither all of the new data nor all of the old data is recoverable, a predetermined pattern can be written into the affected locations.
    Type: Application
    Filed: January 24, 2014
    Publication date: April 23, 2015
    Applicant: NetApp, Inc.
    Inventors: Greg William Achilles, Gordon Hulpieu, Donald Roman Humlicek, Martin Oree Parrish, Kent Prosch, Alan Stewart