Patents by Inventor Kent Yang

Kent Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12482761
    Abstract: A semiconductor device package includes a multi-layer substrate including a bottom layer and a top layer. One or more dies are mounted on and electrically coupled to the top layer of the substrate. An electromagnetic interference (EMI) shield encapsulates the substrate and the semiconductor dies. A first plurality of conductive stubs is positioned around edges of the top layer of the substrate. Each of the conductive stubs includes an edge portion having a first thickness and in contact with the EMI shield. A second plurality of conductive stubs is positioned around edges of the bottom layer of the substrate. Each of the second plurality of conductive stubs includes an edge portion having a second thickness less than the first thickness and in contact with the EMI shield.
    Type: Grant
    Filed: October 25, 2021
    Date of Patent: November 25, 2025
    Assignee: SANDISK TECHNOLOGIES, INC.
    Inventors: Simon Dong, Hope Chiu, Weiting Jiang, Elley Zhang, Kent Yang, Hua Tan, Jerry Tang, Rui Guo
  • Patent number: 12062625
    Abstract: A semiconductor package includes a substrate having a top planar surface and a semiconductor die mounted on the top planar surface of the substrate. Bond wires electrically connect the semiconductor die to the substrate. Flow control dams are integrally formed with the top planar surface of the substrate and each flow control dam protrudes from the top planar surface of the substrate at a location proximate to the bond wires. The flow control dams reduce the occurrence of wire sweep in the bond wires electrically connected to the substrate and semiconductor die.
    Type: Grant
    Filed: September 30, 2021
    Date of Patent: August 13, 2024
    Assignee: SANDISK TECHNOLOGIES, INC.
    Inventors: Hope Chiu, Hua Tan, Kent Yang, Weiting Jiang, Jerry Tang, Simon Dong, Yuequan Shi, Rosy Zhao
  • Publication number: 20230345633
    Abstract: A Printed Circuit Board (PCB) or substrate has a bump pad layer and a separate trace metal layer. The bump pad layer substantially covers or overlays the trace metal layer. A first surface of a bump pad in the bump pad layer is electrically coupled to a trace in the trace metal layer. A second surface of the bump pad in the bump pad layer extends above a surface of the bump pad layer. When a component is mounted on the substrate during a component mounting process, a pillar or other electrical connection mechanism of the component is electrically coupled to the bump pad without the risk of solder non-wetting and/or the formation of solder bridges between traces and bump pads on the substrate.
    Type: Application
    Filed: April 22, 2022
    Publication date: October 26, 2023
    Inventors: Kent Yang, Jackson Wang, Jack Yang, Olga Chen, Milton Tzeng, Jinxiang Huang
  • Publication number: 20230129628
    Abstract: A semiconductor device package includes a multi-layer substrate including a bottom layer and a top layer. One or more dies are mounted on and electrically coupled to the top layer of the substrate. An electromagnetic interference (EMI) shield encapsulates the substrate and the semiconductor dies. A first plurality of conductive stubs is positioned around edges of the top layer of the substrate. Each of the conductive stubs includes an edge portion having a first thickness and in contact with the EMI shield. A second plurality of conductive stubs is positioned around edges of the bottom layer of the substrate. Each of the second plurality of conductive stubs includes an edge portion having a second thickness less than the first thickness and in contact with the EMI shield.
    Type: Application
    Filed: October 25, 2021
    Publication date: April 27, 2023
    Applicant: Western Digital Technologies, Inc.
    Inventors: Simon Dong, Hope Chiu, Weiting Jiang, Elley Zhang, Kent Yang, Hua Tan, Jerry Tang, Rui Guo
  • Publication number: 20230102959
    Abstract: A semiconductor package includes a substrate having a top planar surface and a semiconductor die mounted on the top planar surface of the substrate. Bond wires electrically connect the semiconductor die to the substrate. Flow control dams are integrally formed with the top planar surface of the substrate and each flow control dam protrudes from the top planar surface of the substrate at a location proximate to the bond wires. The flow control dams reduce the occurrence of wire sweep in the bond wires electrically connected to the substrate and semiconductor die.
    Type: Application
    Filed: September 30, 2021
    Publication date: March 30, 2023
    Applicant: Western Digital Technologies, Inc.
    Inventors: Hope Chiu, Hua Tan, Kent Yang, Weiting Jiang, Jerry Tang, Simon Dong, Yuequan Shi, Rosy Zhao
  • Patent number: 11508644
    Abstract: A semiconductor device package includes a substrate, a first heat-generating component positioned on a surface of the substrate, an encapsulant at least partially encapsulating the first heat-generating component, and one or more channels extending through a portion of the encapsulant toward the first heat-generating component. Each of the one or more channels contains a thermally conductive material having a thermal conductivity greater than a thermal conductivity of the encapsulant.
    Type: Grant
    Filed: February 26, 2021
    Date of Patent: November 22, 2022
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Yazhou Zhang, Shineng Ma, Kent Yang, Hope Chiu
  • Publication number: 20220216128
    Abstract: A semiconductor device package includes a substrate, a first heat-generating component positioned on a surface of the substrate, an encapsulant at least partially encapsulating the first heat-generating component, and one or more channels extending through a portion of the encapsulant toward the first heat-generating component. Each of the one or more channels contains a thermally conductive material having a thermal conductivity greater than a thermal conductivity of the encapsulant.
    Type: Application
    Filed: February 26, 2021
    Publication date: July 7, 2022
    Applicant: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Yazhou Zhang, Shineng Ma, Kent Yang, Hope Chiu