Abstract: A power controllable wireless communication device includes a variable gain amplifier having a gain that can be controlled based on a gain control signal, a reference power generation circuit, which generates first reference power and second reference power differing from the first reference power, a sensor circuit supplied with selectively power of a high frequency signal output from the variable gain amplifier, and the first reference power and the second reference power generated by the reference power generation circuit, and a control circuit which generates the gain control signal based on a sensor output from the sensor circuit. When controlling power, the control circuit generates the gain control signal based on ratios among a first sensor output corresponding to the first reference power, a second sensor output corresponding to the second reference power, and a high frequency sensor output corresponding to the power of the high frequency signal.

Abstract: A power controllable wireless communication device includes a variable gain amplifier having a gain that can be controlled based on a gain control signal, a reference power generation circuit, which generates first reference power and second reference power differing from the first reference power, a sensor circuit supplied with selectively power of a high frequency signal output from the variable gain amplifier, and the first reference power and the second reference power generated by the reference power generation circuit, and a control circuit which generates the gain control signal based on a sensor output from the sensor circuit. When controlling power, the control circuit generates the gain control signal based on ratios among a first sensor output corresponding to the first reference power, a second sensor output corresponding to the second reference power, and a high frequency sensor output corresponding to the power of the high frequency signal.

Abstract: A bias circuit includes a first p-n junction element supplied with a current by a first current source connected to a low-voltage side of the first p-n junction element and a base terminal of a second transistor, a second p-n junction element supplied with a current by a second current source, the second current source connected to a low-voltage side of the second p-n junction element and a base terminal of a first transistor, the first and second transistors connected at their emitter terminals to a third current source and receiving base voltages generated by the first and second p-n junction elements, respectively. The second transistor and the first transistor constitute a differential pair in which, at a collector terminal of the second transistor, a current having a temperature coefficient that is substantially twice the temperature coefficient of the current of the second current source is obtained.

Abstract: A bias circuit includes a first p-n junction element supplied with a current by a first current source connected to a low-voltage side of the first p-n junction element and a base terminal of a second transistor, a second p-n junction element supplied with a current by a second current source, the second current source connected to a low-voltage side of the second p-n junction element and a base terminal of a first transistor, the first and second transistors connected at their emitter terminals to a third current source and receiving base voltages generated by the first and second p-n junction elements, respectively. The second transistor and the first transistor constitute a differential pair in which, at a collector terminal of the second transistor, a current having a temperature coefficient that is substantially twice the temperature coefficient of the current of the second current source is obtained.