Patents by Inventor Kenta Ninose
Kenta Ninose has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10387062Abstract: A storage system according to one aspect of the present invention includes a plurality of storage devices using flash memory as a storage medium. The flash memory used for the storage device may include flash memory configured to operate each cell as a cell capable of storing n-bit information or a cell capable of storing m-bit information (where n<m), where n=2 and m=3. The storage system may periodically acquire a number of remaining erasures from the storage device and predict the lifetime of the storage device by using the acquired number of remaining erasures and the storage device operation time. If the predicted lifetime is greater than a predetermined value (service life), a predetermined number of cells may be changed to cells capable of storing m-bit information.Type: GrantFiled: November 27, 2015Date of Patent: August 20, 2019Assignee: HITACHI, LTD.Inventors: Tomotaro Doi, Shigeo Homma, Kenta Ninose
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Patent number: 10229742Abstract: A flash memory controller is configured to hold a read pattern defining an order of selection of read options specifying a parameter value for a read from the flash memory chip. The flash memory controller is configured to execute error correction on data read from the flash memory chip in accordance with the read command. The flash memory controller is configured to designate a next read option specified in the read pattern to read the data from the flash memory chip in a case where all errors in the read data are not corrected by the error correction.Type: GrantFiled: June 19, 2015Date of Patent: March 12, 2019Assignee: Hitachi, Ltd.Inventors: Yohei Hazama, Junji Ogawa, Kenta Ninose
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Patent number: 10204003Abstract: A failure region is specified when a failure occurs in a non-volatile semiconductor memory. When a device controller reads data stored in a specific page in a plurality of non-volatile semiconductor memories to detect an uncorrectable error (UE) of the data stored in the specific page, the device controller executes a diagnosis process including specifying a specific storage circuit that is a storage circuit including the specific page, reading data stored in a part of blocks of the specific storage circuit, and specifying, on the basis of a result of reading data stored in the block, a failure region in the specific storage circuit.Type: GrantFiled: August 27, 2014Date of Patent: February 12, 2019Assignee: Hitachi, Ltd.Inventors: Kenta Ninose, Takuji Itou, Fumio Yoshioka, Takashi Tsunehiro, Go Uehara, Shigeo Homma
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Patent number: 10198318Abstract: A nonvolatile memory device includes: a nonvolatile memory including a plurality of physical blocks; and a memory controller configured to execute an internal process of migrating data between physical blocks. The memory controller is configured to select, based on an update frequency level which is identified with respect to a logical address range from a higher-level apparatus, a physical block to be allocated to the logical address range from among the plurality of physical blocks. The memory controller is configured to determine, in the internal process, whether to set a migration destination level (an update frequency level of a migration destination physical block) to a same level as or a different level from a migration source level (an update frequency level of a migration source physical block) based on whether or not an attribute of the migration source physical block satisfies a prescribed condition.Type: GrantFiled: October 27, 2014Date of Patent: February 5, 2019Assignee: HITACHI, LTD.Inventors: Yoshihiro Oikawa, Hiroshi Hirayama, Kenta Ninose
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Patent number: 10146435Abstract: A storage system includes a plurality of storage devices, each including a storage medium and a compression function for data, and a storage controller coupled to the plurality of storage devices. The storage controller includes compression necessity information indicating necessity of compression of the data in a write command to be transmitted to a storage device at a write destination among the plurality of storage devices. The storage device at the write destination writes, when the compression necessity information included in the received write command indicates that compression is unnecessary, the data in the storage medium without compressing the data.Type: GrantFiled: July 31, 2013Date of Patent: December 4, 2018Assignee: Hitachi, Ltd.Inventors: Kenta Ninose, Junji Ogawa
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Publication number: 20180275894Abstract: According to one aspect of the present invention, the storage system has a storage controller and a plurality of storage devices. Each storage device calculates its degradation level based on an error bit count (number of correctable errors that have occurred during read), and transmits the same to the storage controller. By calculating the life of each RAID group based on the received degradation levels of the respective storage devices, the storage controller specifies the RAID group predicted to reach its life before achieving a target service life (target life), and migrates the data stored in the specified RAID group to a different RAID group.Type: ApplicationFiled: January 20, 2015Publication date: September 27, 2018Inventors: Yukihiro YOSHINO, Shigeo HOMMA, Kenta NINOSE
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Publication number: 20180203631Abstract: A storage system according to one aspect of the present invention includes a plurality of storage devices using flash memory as a storage medium. The flash memory used for the storage device may include flash memory configured to operate each cell as a cell capable of storing n-bit information or a cell capable of storing m-bit information (where n<m). The storage system may periodically acquire a number of remaining erasures form the storage device and predict the lifetime of the storage device by using the acquired number of remaining erasures and the storage device operation time. If the predicted lifetime is greater than a predetermined value (service life) a predetermined number of cells may be changed to cells capable of storing m-bit information.Type: ApplicationFiled: November 27, 2015Publication date: July 19, 2018Applicant: HITACHI, LTD.Inventors: Tomotaro DOI, Shigeo HOMMA, Kenta NINOSE
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Publication number: 20180061498Abstract: A flash memory controller is configured to hold a read pattern defining an order of selection of read options specifying a parameter value for a read from the flash memory chip. The flash memory controller is configured to execute error correction on data read from the flash memory chip in accordance with the read command. The flash memory controller is configured to designate a next read option specified in the read pattern to read the data from the flash memory chip in a case where all errors in the read data are not corrected by the error correction.Type: ApplicationFiled: June 19, 2015Publication date: March 1, 2018Applicant: Hitachi, Ltd.Inventors: Yohei HAZAMA, Junji OGAWA, Kenta NINOSE
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Patent number: 9817768Abstract: Provided is a storage system including: a storage medium including a plurality of physical storage areas having an upper limit number of rewrites, and a medium controller that controls I/O (input/output) of data to/from the plurality of physical storage areas; and a storage controller connected to the storage medium, wherein when any of the physical storage areas is not allocated to a write destination logical storage area among a plurality of logical storage areas, the medium controller allocates a vacant physical storage area among the plurality of physical storage areas to the write destination logical storage area and writes write target data to the allocated vacant physical storage area, and the plurality of logical storage areas includes an available logical area group determined based on a relationship between an available capacity of a logical storage capacity and a rewrite frequency of the plurality of physical storage areas.Type: GrantFiled: October 10, 2013Date of Patent: November 14, 2017Assignee: HITACHI, LTD.Inventors: Keisuke Ueda, Go Uehara, Kenta Ninose, Hiroshi Hirayama
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Publication number: 20170308722Abstract: A nonvolatile memory device includes: a nonvolatile memory including a plurality of physical blocks; and a memory controller configured to execute an internal process of migrating data between physical blocks. The memory controller is configured to select, based on an update frequency level which is identified with respect to a logical address range from a higher-level apparatus, a physical block to be allocated to the logical address range from among the plurality of physical blocks. The memory controller is configured to determine, in the internal process, whether to set a migration destination level (an update frequency level of a migration destination physical block) to a same level as or a different level from a migration source level (an update frequency level of a migration source physical block) based on whether or not an attribute of the migration source physical block satisfies a prescribed condition.Type: ApplicationFiled: October 27, 2014Publication date: October 26, 2017Inventors: Yoshihiro OIKAWA, Hiroshi HIRAYAMA, Kenta NINOSE
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Publication number: 20160259675Abstract: A failure region is specified when a failure occurs in a non-volatile semiconductor memory. When a device controller reads data stored in a specific page in a plurality of non-volatile semiconductor memories to detect an uncorrectable error (UE) of the data stored in the specific page, the device controller executes a diagnosis process including specifying a specific storage circuit that is a storage circuit including the specific page, reading data stored in a part of blocks of the specific storage circuit, and specifying, on the basis of a result of reading data stored in the block, a failure region in the specific storage circuit.Type: ApplicationFiled: August 27, 2014Publication date: September 8, 2016Applicant: HITACHI, LTD.Inventors: Kenta NINOSE, Takuji ITOU, Fumio YOSHIOKA, Takashi TSUNEHIRO, Go UEHARA, Shigeo HOMMA
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Patent number: 9298388Abstract: A data management apparatus of a computer system comprises, as a retention rule for volume data, change-time identification information for identifying a point-in-time for changing a logical unit, and migration-destination unit specification information for specifying a migration-destination logical unit. An edge storage apparatus stores first identification information, which enables the identification of volume data in a logical unit, and second identification information, which enables the identification of a logical unit in a storage system after associating the first identification information and the second identification information with each other. A data management apparatus (A1) transfers the volume data from a migration-source logical unit to the migration-destination logical unit conforming to the migration-destination unit specification information subsequent to a point-in-time identified in accordance with the change-time identification information.Type: GrantFiled: July 26, 2012Date of Patent: March 29, 2016Assignee: Hitachi, Ltd.Inventors: Naoki Takeuchi, Kenta Ninose
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Publication number: 20160019159Abstract: Provided is a storage system including: a storage medium including a plurality of physical storage areas having an upper limit number of rewrites, and a medium controller that controls I/O (input/output) of data to/from the plurality of physical storage areas; and a storage controller connected to the storage medium, wherein when any of the physical storage areas is not allocated to a write destination logical storage area among a plurality of logical storage areas, the medium controller allocates a vacant physical storage area among the plurality of physical storage areas to the write destination logical storage area and writes write target data to the allocated vacant physical storage area, and the plurality of logical storage areas includes an available logical area group determined based on a relationship between an available capacity of a logical storage capacity and a rewrite frequency of the plurality of physical storage areas.Type: ApplicationFiled: October 10, 2013Publication date: January 21, 2016Applicant: Hitachi, Ltd.Inventors: KEISUKE UEDA, Go UEHARA, Kenta NINOSE, Hiroshi HIRAYAMA
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Publication number: 20160011786Abstract: A storage system includes a plurality of storage devices, each including a storage medium and a compression function for data, and a storage controller coupled to the plurality of storage devices. The storage controller includes compression necessity information indicating necessity of compression of the data in a write command to be transmitted to a storage device at a write destination among the plurality of storage devices. The storage device at the write destination writes, when the compression necessity information included in the received write command indicates that compression is unnecessary, the data in the storage medium without compressing the data.Type: ApplicationFiled: July 31, 2013Publication date: January 14, 2016Inventors: Kenta NINOSE, Junji OGAWA
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Patent number: 8832397Abstract: Availability of an information system including a storage apparatus and a host computer is improved. A host system includes a first storage apparatus provided with a first volume for storing data, and a second storage apparatus for storing the data sent from the first storage apparatus. In case of a failure occurring in the first storage apparatus, the host sends the data to be sent to the first storage apparatus to the second storage apparatus.Type: GrantFiled: August 2, 2012Date of Patent: September 9, 2014Assignee: Hitachi, Ltd.Inventors: Takashige Iwamura, Kenta Ninose, Yoshiaki Eguchi, Yasuo Watanabe, Hisao Homma, Yasutomo Yamamoto
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Publication number: 20140237179Abstract: Availability of an information system including a storage apparatus and a host computer is improved. A host system includes a first storage apparatus provided with a first volume for storing data, and a second storage apparatus for storing the data sent from the first storage apparatus. In case of a failure occurring in the first storage apparatus, the host sends the data to be sent to the first storage apparatus to the second storage apparatus. The same identification number is used by the host computer for accessing data stored in the first volume via a first virtual volume and for accessing data stored in a second volume of the second storage system via a second virtual volume.Type: ApplicationFiled: April 25, 2014Publication date: August 21, 2014Applicant: HITACHI, LTD.Inventors: Takashige Iwamura, Kenta Ninose, Yoshiaki Eguchi, Yasuo Watanabe, Hisao Homma, Yasutomo Yamamoto
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Patent number: 8782354Abstract: Efficient data processing is implemented by using the functions of an external storage apparatus which is connected to the virtual storage apparatus. A storage apparatus which is connected to a host apparatus which requests data I/Os and to an external storage apparatus comprising a storage device respectively via a network, comprising a storage device storing data which is read and written by the host apparatus; and a control device which controls data writing to a storage area, wherein the control device provides a predetermined storage area of the storage device of the external storage apparatus to the host apparatus as one or more virtual volumes, and manages the virtual volumes and function information indicating the functions of the external storage apparatus in association with one another.Type: GrantFiled: June 7, 2011Date of Patent: July 15, 2014Assignee: Hitachi, Ltd.Inventors: Kenta Ninose, Yoshiaki Eguchi, Akira Yamamoto, Ai Satoyama
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Patent number: 8762768Abstract: A storage system including: a controller; and, a plurality of physical storage devices coupled to the controller and constituting a RAID group; wherein the controller provides one or more logical volumes belonging to the RAID group, each of the one or more logical volumes having a plurality of storage areas; and one or more virtual volumes, wherein, when receiving a write request to a virtual volume of the one or more virtual volumes, the controller is configured to: allocate a storage area in a logical volume to the virtual volume, as an allocated storage area, where reliability of the storage area is used as a criterion in a selection of the storage area for allocation to the virtual volume; and write data to the allocated storage area, wherein, the controller is configured to selectively perform a RAID allocation process to a storage area allocated to a virtual volume.Type: GrantFiled: August 9, 2013Date of Patent: June 24, 2014Assignee: Hitachi, Ltd.Inventors: Kenta Ninose, Tomohiro Kawaguchi, Yoshiaki Eguchi
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Patent number: 8645649Abstract: A computer system includes: a first storage apparatus; a second storage apparatus; a first volume of the first storage apparatus; and a second volume of the second storage apparatus; wherein the first volume and the second volume have a copy pair relationship and a host system recognizes the second volume as the same volume as the first volume; and wherein the first storage apparatus sends reservation information of the first volume to the second storage apparatus; and the second storage apparatus controls access from the host system on the basis of the received reservation information.Type: GrantFiled: September 29, 2011Date of Patent: February 4, 2014Assignee: Hitachi, Ltd.Inventors: Keiichi Kaiya, Noboru Furuumi, Kenta Ninose
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Publication number: 20140032838Abstract: A data management apparatus of a computer system comprises, as a retention rule for volume data, change-time identification information for identifying a point-in-time for changing a logical unit, and migration-destination unit specification information for specifying a migration-destination logical unit. An edge storage apparatus stores first identification information, which enables the identification of volume data in a logical unit, and second identification information, which enables the identification of a logical unit in a storage system after associating the first identification information and the second identification information with each other. A data management apparatus (A1) transfers the volume data from a migration-source logical unit to the migration-destination logical unit conforming to the migration-destination unit specification information subsequent to a point-in-time identified in accordance with the change-time identification information.Type: ApplicationFiled: July 26, 2012Publication date: January 30, 2014Applicant: HITACHI, LTD.Inventors: Naoki Takeuchi, Kenta Ninose