Patents by Inventor Kenta Ninose

Kenta Ninose has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10387062
    Abstract: A storage system according to one aspect of the present invention includes a plurality of storage devices using flash memory as a storage medium. The flash memory used for the storage device may include flash memory configured to operate each cell as a cell capable of storing n-bit information or a cell capable of storing m-bit information (where n<m), where n=2 and m=3. The storage system may periodically acquire a number of remaining erasures from the storage device and predict the lifetime of the storage device by using the acquired number of remaining erasures and the storage device operation time. If the predicted lifetime is greater than a predetermined value (service life), a predetermined number of cells may be changed to cells capable of storing m-bit information.
    Type: Grant
    Filed: November 27, 2015
    Date of Patent: August 20, 2019
    Assignee: HITACHI, LTD.
    Inventors: Tomotaro Doi, Shigeo Homma, Kenta Ninose
  • Patent number: 10229742
    Abstract: A flash memory controller is configured to hold a read pattern defining an order of selection of read options specifying a parameter value for a read from the flash memory chip. The flash memory controller is configured to execute error correction on data read from the flash memory chip in accordance with the read command. The flash memory controller is configured to designate a next read option specified in the read pattern to read the data from the flash memory chip in a case where all errors in the read data are not corrected by the error correction.
    Type: Grant
    Filed: June 19, 2015
    Date of Patent: March 12, 2019
    Assignee: Hitachi, Ltd.
    Inventors: Yohei Hazama, Junji Ogawa, Kenta Ninose
  • Patent number: 10204003
    Abstract: A failure region is specified when a failure occurs in a non-volatile semiconductor memory. When a device controller reads data stored in a specific page in a plurality of non-volatile semiconductor memories to detect an uncorrectable error (UE) of the data stored in the specific page, the device controller executes a diagnosis process including specifying a specific storage circuit that is a storage circuit including the specific page, reading data stored in a part of blocks of the specific storage circuit, and specifying, on the basis of a result of reading data stored in the block, a failure region in the specific storage circuit.
    Type: Grant
    Filed: August 27, 2014
    Date of Patent: February 12, 2019
    Assignee: Hitachi, Ltd.
    Inventors: Kenta Ninose, Takuji Itou, Fumio Yoshioka, Takashi Tsunehiro, Go Uehara, Shigeo Homma
  • Patent number: 10198318
    Abstract: A nonvolatile memory device includes: a nonvolatile memory including a plurality of physical blocks; and a memory controller configured to execute an internal process of migrating data between physical blocks. The memory controller is configured to select, based on an update frequency level which is identified with respect to a logical address range from a higher-level apparatus, a physical block to be allocated to the logical address range from among the plurality of physical blocks. The memory controller is configured to determine, in the internal process, whether to set a migration destination level (an update frequency level of a migration destination physical block) to a same level as or a different level from a migration source level (an update frequency level of a migration source physical block) based on whether or not an attribute of the migration source physical block satisfies a prescribed condition.
    Type: Grant
    Filed: October 27, 2014
    Date of Patent: February 5, 2019
    Assignee: HITACHI, LTD.
    Inventors: Yoshihiro Oikawa, Hiroshi Hirayama, Kenta Ninose
  • Patent number: 10146435
    Abstract: A storage system includes a plurality of storage devices, each including a storage medium and a compression function for data, and a storage controller coupled to the plurality of storage devices. The storage controller includes compression necessity information indicating necessity of compression of the data in a write command to be transmitted to a storage device at a write destination among the plurality of storage devices. The storage device at the write destination writes, when the compression necessity information included in the received write command indicates that compression is unnecessary, the data in the storage medium without compressing the data.
    Type: Grant
    Filed: July 31, 2013
    Date of Patent: December 4, 2018
    Assignee: Hitachi, Ltd.
    Inventors: Kenta Ninose, Junji Ogawa
  • Publication number: 20180275894
    Abstract: According to one aspect of the present invention, the storage system has a storage controller and a plurality of storage devices. Each storage device calculates its degradation level based on an error bit count (number of correctable errors that have occurred during read), and transmits the same to the storage controller. By calculating the life of each RAID group based on the received degradation levels of the respective storage devices, the storage controller specifies the RAID group predicted to reach its life before achieving a target service life (target life), and migrates the data stored in the specified RAID group to a different RAID group.
    Type: Application
    Filed: January 20, 2015
    Publication date: September 27, 2018
    Inventors: Yukihiro YOSHINO, Shigeo HOMMA, Kenta NINOSE
  • Publication number: 20180203631
    Abstract: A storage system according to one aspect of the present invention includes a plurality of storage devices using flash memory as a storage medium. The flash memory used for the storage device may include flash memory configured to operate each cell as a cell capable of storing n-bit information or a cell capable of storing m-bit information (where n<m). The storage system may periodically acquire a number of remaining erasures form the storage device and predict the lifetime of the storage device by using the acquired number of remaining erasures and the storage device operation time. If the predicted lifetime is greater than a predetermined value (service life) a predetermined number of cells may be changed to cells capable of storing m-bit information.
    Type: Application
    Filed: November 27, 2015
    Publication date: July 19, 2018
    Applicant: HITACHI, LTD.
    Inventors: Tomotaro DOI, Shigeo HOMMA, Kenta NINOSE
  • Publication number: 20180061498
    Abstract: A flash memory controller is configured to hold a read pattern defining an order of selection of read options specifying a parameter value for a read from the flash memory chip. The flash memory controller is configured to execute error correction on data read from the flash memory chip in accordance with the read command. The flash memory controller is configured to designate a next read option specified in the read pattern to read the data from the flash memory chip in a case where all errors in the read data are not corrected by the error correction.
    Type: Application
    Filed: June 19, 2015
    Publication date: March 1, 2018
    Applicant: Hitachi, Ltd.
    Inventors: Yohei HAZAMA, Junji OGAWA, Kenta NINOSE
  • Patent number: 9817768
    Abstract: Provided is a storage system including: a storage medium including a plurality of physical storage areas having an upper limit number of rewrites, and a medium controller that controls I/O (input/output) of data to/from the plurality of physical storage areas; and a storage controller connected to the storage medium, wherein when any of the physical storage areas is not allocated to a write destination logical storage area among a plurality of logical storage areas, the medium controller allocates a vacant physical storage area among the plurality of physical storage areas to the write destination logical storage area and writes write target data to the allocated vacant physical storage area, and the plurality of logical storage areas includes an available logical area group determined based on a relationship between an available capacity of a logical storage capacity and a rewrite frequency of the plurality of physical storage areas.
    Type: Grant
    Filed: October 10, 2013
    Date of Patent: November 14, 2017
    Assignee: HITACHI, LTD.
    Inventors: Keisuke Ueda, Go Uehara, Kenta Ninose, Hiroshi Hirayama
  • Publication number: 20170308722
    Abstract: A nonvolatile memory device includes: a nonvolatile memory including a plurality of physical blocks; and a memory controller configured to execute an internal process of migrating data between physical blocks. The memory controller is configured to select, based on an update frequency level which is identified with respect to a logical address range from a higher-level apparatus, a physical block to be allocated to the logical address range from among the plurality of physical blocks. The memory controller is configured to determine, in the internal process, whether to set a migration destination level (an update frequency level of a migration destination physical block) to a same level as or a different level from a migration source level (an update frequency level of a migration source physical block) based on whether or not an attribute of the migration source physical block satisfies a prescribed condition.
    Type: Application
    Filed: October 27, 2014
    Publication date: October 26, 2017
    Inventors: Yoshihiro OIKAWA, Hiroshi HIRAYAMA, Kenta NINOSE
  • Publication number: 20160259675
    Abstract: A failure region is specified when a failure occurs in a non-volatile semiconductor memory. When a device controller reads data stored in a specific page in a plurality of non-volatile semiconductor memories to detect an uncorrectable error (UE) of the data stored in the specific page, the device controller executes a diagnosis process including specifying a specific storage circuit that is a storage circuit including the specific page, reading data stored in a part of blocks of the specific storage circuit, and specifying, on the basis of a result of reading data stored in the block, a failure region in the specific storage circuit.
    Type: Application
    Filed: August 27, 2014
    Publication date: September 8, 2016
    Applicant: HITACHI, LTD.
    Inventors: Kenta NINOSE, Takuji ITOU, Fumio YOSHIOKA, Takashi TSUNEHIRO, Go UEHARA, Shigeo HOMMA
  • Patent number: 9298388
    Abstract: A data management apparatus of a computer system comprises, as a retention rule for volume data, change-time identification information for identifying a point-in-time for changing a logical unit, and migration-destination unit specification information for specifying a migration-destination logical unit. An edge storage apparatus stores first identification information, which enables the identification of volume data in a logical unit, and second identification information, which enables the identification of a logical unit in a storage system after associating the first identification information and the second identification information with each other. A data management apparatus (A1) transfers the volume data from a migration-source logical unit to the migration-destination logical unit conforming to the migration-destination unit specification information subsequent to a point-in-time identified in accordance with the change-time identification information.
    Type: Grant
    Filed: July 26, 2012
    Date of Patent: March 29, 2016
    Assignee: Hitachi, Ltd.
    Inventors: Naoki Takeuchi, Kenta Ninose
  • Publication number: 20160019159
    Abstract: Provided is a storage system including: a storage medium including a plurality of physical storage areas having an upper limit number of rewrites, and a medium controller that controls I/O (input/output) of data to/from the plurality of physical storage areas; and a storage controller connected to the storage medium, wherein when any of the physical storage areas is not allocated to a write destination logical storage area among a plurality of logical storage areas, the medium controller allocates a vacant physical storage area among the plurality of physical storage areas to the write destination logical storage area and writes write target data to the allocated vacant physical storage area, and the plurality of logical storage areas includes an available logical area group determined based on a relationship between an available capacity of a logical storage capacity and a rewrite frequency of the plurality of physical storage areas.
    Type: Application
    Filed: October 10, 2013
    Publication date: January 21, 2016
    Applicant: Hitachi, Ltd.
    Inventors: KEISUKE UEDA, Go UEHARA, Kenta NINOSE, Hiroshi HIRAYAMA
  • Publication number: 20160011786
    Abstract: A storage system includes a plurality of storage devices, each including a storage medium and a compression function for data, and a storage controller coupled to the plurality of storage devices. The storage controller includes compression necessity information indicating necessity of compression of the data in a write command to be transmitted to a storage device at a write destination among the plurality of storage devices. The storage device at the write destination writes, when the compression necessity information included in the received write command indicates that compression is unnecessary, the data in the storage medium without compressing the data.
    Type: Application
    Filed: July 31, 2013
    Publication date: January 14, 2016
    Inventors: Kenta NINOSE, Junji OGAWA
  • Patent number: 8832397
    Abstract: Availability of an information system including a storage apparatus and a host computer is improved. A host system includes a first storage apparatus provided with a first volume for storing data, and a second storage apparatus for storing the data sent from the first storage apparatus. In case of a failure occurring in the first storage apparatus, the host sends the data to be sent to the first storage apparatus to the second storage apparatus.
    Type: Grant
    Filed: August 2, 2012
    Date of Patent: September 9, 2014
    Assignee: Hitachi, Ltd.
    Inventors: Takashige Iwamura, Kenta Ninose, Yoshiaki Eguchi, Yasuo Watanabe, Hisao Homma, Yasutomo Yamamoto
  • Publication number: 20140237179
    Abstract: Availability of an information system including a storage apparatus and a host computer is improved. A host system includes a first storage apparatus provided with a first volume for storing data, and a second storage apparatus for storing the data sent from the first storage apparatus. In case of a failure occurring in the first storage apparatus, the host sends the data to be sent to the first storage apparatus to the second storage apparatus. The same identification number is used by the host computer for accessing data stored in the first volume via a first virtual volume and for accessing data stored in a second volume of the second storage system via a second virtual volume.
    Type: Application
    Filed: April 25, 2014
    Publication date: August 21, 2014
    Applicant: HITACHI, LTD.
    Inventors: Takashige Iwamura, Kenta Ninose, Yoshiaki Eguchi, Yasuo Watanabe, Hisao Homma, Yasutomo Yamamoto
  • Patent number: 8782354
    Abstract: Efficient data processing is implemented by using the functions of an external storage apparatus which is connected to the virtual storage apparatus. A storage apparatus which is connected to a host apparatus which requests data I/Os and to an external storage apparatus comprising a storage device respectively via a network, comprising a storage device storing data which is read and written by the host apparatus; and a control device which controls data writing to a storage area, wherein the control device provides a predetermined storage area of the storage device of the external storage apparatus to the host apparatus as one or more virtual volumes, and manages the virtual volumes and function information indicating the functions of the external storage apparatus in association with one another.
    Type: Grant
    Filed: June 7, 2011
    Date of Patent: July 15, 2014
    Assignee: Hitachi, Ltd.
    Inventors: Kenta Ninose, Yoshiaki Eguchi, Akira Yamamoto, Ai Satoyama
  • Patent number: 8762768
    Abstract: A storage system including: a controller; and, a plurality of physical storage devices coupled to the controller and constituting a RAID group; wherein the controller provides one or more logical volumes belonging to the RAID group, each of the one or more logical volumes having a plurality of storage areas; and one or more virtual volumes, wherein, when receiving a write request to a virtual volume of the one or more virtual volumes, the controller is configured to: allocate a storage area in a logical volume to the virtual volume, as an allocated storage area, where reliability of the storage area is used as a criterion in a selection of the storage area for allocation to the virtual volume; and write data to the allocated storage area, wherein, the controller is configured to selectively perform a RAID allocation process to a storage area allocated to a virtual volume.
    Type: Grant
    Filed: August 9, 2013
    Date of Patent: June 24, 2014
    Assignee: Hitachi, Ltd.
    Inventors: Kenta Ninose, Tomohiro Kawaguchi, Yoshiaki Eguchi
  • Patent number: 8645649
    Abstract: A computer system includes: a first storage apparatus; a second storage apparatus; a first volume of the first storage apparatus; and a second volume of the second storage apparatus; wherein the first volume and the second volume have a copy pair relationship and a host system recognizes the second volume as the same volume as the first volume; and wherein the first storage apparatus sends reservation information of the first volume to the second storage apparatus; and the second storage apparatus controls access from the host system on the basis of the received reservation information.
    Type: Grant
    Filed: September 29, 2011
    Date of Patent: February 4, 2014
    Assignee: Hitachi, Ltd.
    Inventors: Keiichi Kaiya, Noboru Furuumi, Kenta Ninose
  • Publication number: 20140032838
    Abstract: A data management apparatus of a computer system comprises, as a retention rule for volume data, change-time identification information for identifying a point-in-time for changing a logical unit, and migration-destination unit specification information for specifying a migration-destination logical unit. An edge storage apparatus stores first identification information, which enables the identification of volume data in a logical unit, and second identification information, which enables the identification of a logical unit in a storage system after associating the first identification information and the second identification information with each other. A data management apparatus (A1) transfers the volume data from a migration-source logical unit to the migration-destination logical unit conforming to the migration-destination unit specification information subsequent to a point-in-time identified in accordance with the change-time identification information.
    Type: Application
    Filed: July 26, 2012
    Publication date: January 30, 2014
    Applicant: HITACHI, LTD.
    Inventors: Naoki Takeuchi, Kenta Ninose