Abstract: A cleaning method of cleaning a solution treatment apparatus for applying a coating solution onto a substrate, the solution treatment apparatus including a holder holding and rotating the substrate; a coating solution supplier; and an inner cup surrounding the holder from a lateral side and having a peripheral edge side upper surface inclining down outward in a radial direction. The cleaning method includes introducing the cleaning solution to the storage chamber via the introduction hole, discharging the cleaning solution from the discharge port and making the cleaning solution flow down along the peripheral edge side upper surface of the inner cup, thereby cleaning away the coating solution adhering to the peripheral edge side upper surface. The discharging in the cleaning discharges the cleaning solution from discharge ports of the inner cup outward in the radial direction and obliquely upward.

Abstract: A liquid processing apparatus that applies a coating liquid onto a substrate, includes: a substrate holder that holds and rotates the substrate; a coating liquid supplier that applies the coating liquid to the substrate; a cup provided to surround the substrate; and a solvent supplier that supplies a solvent for the coating liquid to a coating liquid collector. The cup includes: an outer cup arranged outside the substrate holder; an inner cup arranged on an inner peripheral side of the outer cup below the substrate holder and having a downwardly-extending wall; an exhaust path provided between the outer and inner cups; a cylindrical wall portion provided below the inner cup and having an upwardly-opened exhaust port communicating with the exhaust path; and the coating liquid collector arranged below the wall of the inner cup with a gap between the coating liquid collector and a lower end of the wall.

Abstract: A liquid processing apparatus that applies a coating liquid onto a substrate, includes: a substrate holder that holds and rotates the substrate; a coating liquid supplier that supplies the coating liquid to the substrate; a cup provided to surround the substrate; and a solvent supplier that supplies a solvent for the coating liquid to a coating liquid collector. The cup includes: an outer cup arranged outside the substrate holder; an inner cup arranged on an inner peripheral side of the outer cup below the substrate holder and having a downwardly-extending wall; an exhaust path provided between the outer and inner cups; and the coating liquid collector provided with a plurality of openings through which an exhaust flow passes, the coating liquid collector extending downward below the downwardly-extending wall of the inner cup with a gap between the coating liquid collector and a lower end of the downwardly-extending wall.

Abstract: A solution treatment apparatus applies a coating solution onto a substrate. The apparatus includes a holder holding and rotating the substrate; a coating solution supplier supplying the coating solution to the substrate on the holder; and an inner cup surrounding the holder from a lateral side and having a peripheral edge side upper surface inclining down outward in a radial direction from an apex part located below a peripheral edge side of the substrate on the holder. The inner cup has discharge ports formed along a circumferential direction at the apex part; and the discharge ports are formed to discharge a cleaning solution and make the cleaning solution flow down along the peripheral edge side upper surface of the inner cup, thereby cleaning the peripheral edge side upper surface, and to discharge the cleaning solution outward in the radial direction and obliquely upward.

Abstract: A memory system includes a memory chip and a memory controller. The memory chip includes a storage region that stores setup data used for setup of the memory chip during power on thereof. The memory controller is configured to determine whether or not the memory controller has the setup data, when determining that the memory controller does not have the setup data, instruct the memory chip to read the setup data from the storage region and perform a first setup operation based on the read setup data, and when determining that the memory controller has the setup data, transmit the setup data to the memory chip and instruct the memory chip to perform a second setup operation based on the setup data received from the memory controller.

Abstract: A solution treatment apparatus for applying a coating solution onto a substrate, includes: a holder holding and rotating the substrate; a coating solution supplier supplying the coating solution to the substrate on the holder; and an inner cup surrounding the holder from a lateral side and having a peripheral edge side upper surface inclining down outward in a radial direction from an apex part located below a peripheral edge side of the substrate on the holder, wherein: the inner cup has a plurality of discharge ports formed along a circumferential direction at the apex part; and the discharge ports are formed to discharge a cleaning solution and make the cleaning solution flow down along the peripheral edge side upper surface of the inner cup, thereby cleaning the peripheral edge side upper surface, and to discharge the cleaning solution outward in the radial direction and obliquely upward.

Abstract: A substrate processing apparatus includes a cover member placed to surround a substrate held by a rotary holder; a collecting member placed in an exhaust path formed between the cover member and the rotary holder; and a solvent supply placed above the collecting member and configured to supply a solvent to the collecting member. The solvent supply includes an inner storage space surrounding the substrate; an outer storage space surrounding the inner storage space; and a partition wall extending along a circumferential direction to partition the inner storage space and the outer storage space. Multiple communication holes are extended to penetrate the partition wall such that the solvent introduced into the outer storage space flows to the inner storage space. Multiple dripping holes are extended to penetrate a bottom wall of the inner storage space such that the solvent within the inner storage space drops toward the collecting member.

Abstract: A semiconductor storage device includes a first chip and a second chip. In response to a first command that is received on a first terminal of the first chip and a second terminal of the second chip that are connected to a command signal line, the first chip and the second chip execute in parallel a first correction process of correcting a duty cycle of a first output signal generated by the first chip and a second correction process of correcting a duty cycle of a second output signal generated by the second chip, respectively, according a common toggle signal.

Abstract: A substrate processing apparatus includes a cover member placed to surround a substrate held by a rotary holder; a collecting member placed in an exhaust path formed between the cover member and the rotary holder; and a solvent supply placed above the collecting member and configured to supply a solvent to the collecting member. The solvent supply includes an inner storage space surrounding the substrate; an outer storage space surrounding the inner storage space; and a partition wall extending along a circumferential direction to partition the inner storage space and the outer storage space. Multiple communication holes are extended to penetrate the partition wall such that the solvent introduced into the outer storage space flows to the inner storage space. Multiple dripping holes are extended to penetrate a bottom wall of the inner storage space such that the solvent within the inner storage space drops toward the collecting member.

Abstract: According to one embodiment, a semiconductor memory device includes a memory cell array, first to third circuits. The first circuit is configured to control duty cycles of first and second signals based on a third signal, and output fourth and fifth signals. The second circuit is configured to acquire information regarding duty cycles. The third circuit is configured to control the third signal. The second circuit includes a switching circuit and a comparator. The switching circuit is configured to transfer the fourth and fifth signals to first and second nodes. The comparator is configured to compare a signal voltages in the first and second nodes, and output the comparison result to the third circuit.

Abstract: According to one embodiment, a semiconductor memory device includes a memory cell array, first to third circuits. The first circuit is configured to control duty cycles of first and second signals based on a third signal, and output fourth and fifth signals. The second circuit is configured to acquire information regarding duty cycles. The third circuit is configured to control the third signal. The second circuit includes a switching circuit and a comparator. The switching circuit is configured to transfer the fourth and fifth signals to first and second nodes. The comparator is configured to compare a signal voltages in the first and second nodes, and output the comparison result to the third circuit.

Abstract: A semiconductor storage device includes a first chip and a second chip. In response to a first command that is received on a first terminal of the first chip and a second terminal of the second chip that are connected to a command signal line, the first chip and the second chip execute in parallel a first correction process of correcting a duty cycle of a first output signal generated by the first chip and a second correction process of correcting a duty cycle of a second output signal generated by the second chip, respectively, according a common toggle signal.

Abstract: A non-volatile semiconductor storage device includes a memory cell array and a control circuit configured to control a data write operation for the memory cell array in a first or second write mode in response to a write command sequence. In the first write mode, the control circuit performs a first write operation, which includes an operation in which one or more bit lines are charged according to write data and an operation in which a write voltage is applied to a selected word line according to address data included in the write command sequence. In the second write mode, the control circuit performs a second write operation, which includes the operation in which the one or more bit lines are charged according to the write data and does not include the operation in which the write voltage is applied to the selected word line.

Abstract: A non-volatile semiconductor storage device includes a memory cell array and a control circuit configured to control a data write operation for the memory cell array in a first or second write mode in response to a write command sequence. In the first write mode, the control circuit performs a first write operation, which includes an operation in which one or more bit lines are charged according to write data and an operation in which a write voltage is applied to a selected word line according to address data included in the write command sequence. In the second write mode, the control circuit performs a second write operation, which includes the operation in which the one or more bit lines are charged according to the write data and does not include the operation in which the write voltage is applied to the selected word line.