Patents by Inventor Kentaro Ichinoseki
Kentaro Ichinoseki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10020391Abstract: According to one embodiment, a semiconductor device includes a semiconductor layer; a plurality of semiconductor regions; second semiconductor region; a first electrode being positioned between the plurality of first semiconductor regions, the first electrode contacting with the semiconductor layer, each of the plurality of first semiconductor regions, and the second semiconductor region via a first insulating film; a second electrode provided below the first electrode, and contacting with the semiconductor layer via a second insulating film; an insulating layer interposed between the first electrode and the second electrode; a third electrode electrically connected to the semiconductor layer; and a fourth electrode connected to the second semiconductor region. The first electrode has a first portion and a pair of second portions. And each of the pair of second portions is provided along the first insulating film.Type: GrantFiled: October 9, 2014Date of Patent: July 10, 2018Assignee: Kabushiki Kaisha ToshibaInventors: Takeru Matsuoka, Nobuyuki Sato, Shigeaki Hayase, Kentaro Ichinoseki
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Patent number: 9842924Abstract: A semiconductor device includes a layer having first and second surfaces, a first region including central and peripheral portions, and a second region on the first region. First trenches extend into the first surface and terminate within the first region in the central portion. Each first trench includes a first electrode and a gate electrode over the first electrode. The first and gate electrodes are spaced from the first and second regions by a first insulating layer. A second trench extends into the first surface and terminates within the first region in the peripheral portion. The second trench includes a second electrode and a third electrode over the second electrode. The second and third electrodes are spaced from the first and second regions by a second insulating layer. A fourth electrode overlies the first insulating layer in the central portion and the second insulating layer in the peripheral portion.Type: GrantFiled: August 25, 2016Date of Patent: December 12, 2017Assignee: Kabushiki Kaisha ToshibaInventors: Hiroaki Katou, Toshifumi Nishiguchi, Saya Shimomura, Akio Suzuki, Kentaro Ichinoseki
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Publication number: 20170222038Abstract: A semiconductor device includes a layer having first and second surfaces, a first region including central and peripheral portions, and a second region on the first region. First trenches extend into the first surface and terminate within the first region in the central portion. Each first trench includes a first electrode and a gate electrode over the first electrode. The first and gate electrodes are spaced from the first and second regions by a first insulating layer. A second trench extends into the first surface and terminates within the first region in the peripheral portion. The second trench includes a second electrode and a third electrode over the second electrode. The second and third electrodes are spaced from the first and second regions by a second insulating layer. A fourth electrode overlies the first insulating layer in the central portion and the second insulating layer in the peripheral portion.Type: ApplicationFiled: August 25, 2016Publication date: August 3, 2017Inventors: Hiroaki KATOU, Toshifumi NISHIGUCHI, Saya SHIMOMURA, Akio SUZUKI, Kentaro ICHINOSEKI
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Patent number: 9041098Abstract: According to one embodiment, the semiconductor device is provided with a first semiconductor layer, a second semiconductor layer, a third semiconductor layer, a pair of first conductors, a pair of second conductors, first wiring layers, and second wiring layers. Each pair of first and second conductors is formed in first and second trenches via the first and second insulating films and is opposite to the first semiconductor layer and the second semiconductor layer. The first wiring layers have main body parts and plural convex parts. Plural convex parts extend from the main body parts and are electrically connected with the first conductors via a first opening part of a first interlayer insulating film. The second wiring layers are electrically connected with the second conductors via a second opening part of the first interlayer insulating film.Type: GrantFiled: July 10, 2013Date of Patent: May 26, 2015Assignee: KABUSHIKI KAISHA TOSHIBAInventor: Kentaro Ichinoseki
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Publication number: 20150021685Abstract: According to one embodiment, a semiconductor device includes a semiconductor layer; a plurality of semiconductor regions; second semiconductor region; a first electrode being positioned between the plurality of first semiconductor regions, the first electrode contacting with the semiconductor layer, each of the plurality of first semiconductor regions, and the second semiconductor region via a first insulating film; a second electrode provided below the first electrode, and contacting with the semiconductor layer via a second insulating film; an insulating layer interposed between the first electrode and the second electrode; a third electrode electrically connected to the semiconductor layer; and a fourth electrode connected to the second semiconductor region. The first electrode has a first portion and a pair of second portions. And each of the pair of second portions is provided along the first insulating film.Type: ApplicationFiled: October 9, 2014Publication date: January 22, 2015Inventors: Takeru MATSUOKA, Nobuyuki SATO, Shigeaki HAYASE, Kentaro ICHINOSEKI
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Patent number: 8884362Abstract: According to one embodiment, a semiconductor device includes a semiconductor layer; a plurality of semiconductor regions; second semiconductor region; a first electrode being positioned between the plurality of first semiconductor regions, the first electrode contacting with the semiconductor layer, each of the plurality of first semiconductor regions, and the second semiconductor region via a first insulating film; a second electrode provided below the first electrode, and contacting with the semiconductor layer via a second insulating film; an insulating layer interposed between the first electrode and the second electrode; a third electrode electrically connected to the semiconductor layer; and a fourth electrode connected to the second semiconductor region. The first electrode has a first portion and a pair of second portions. And each of the pair of second portions is provided along the first insulating film.Type: GrantFiled: September 13, 2012Date of Patent: November 11, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Takeru Matsuoka, Nobuyuki Sato, Shigeaki Hayase, Kentaro Ichinoseki
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Publication number: 20140209999Abstract: A semiconductor device includes a first conductivity-type drain layer, a first conductivity-type drift layer formed on the drain layer, a second conductivity-type base layer formed on the drift layer, a first conductivity-type source layer which is selectively formed on a surface of the base layer, a trench region formed through a surface of the source layer such that the trench region reaches the drift layer from the surface of the source layer, a gate electrode formed adjacent to the base layer and inside the trench region, and surrounded by a first insulation film, a field plate electrode formed in the trench region below the gate electrode and surrounded by a second insulation film having a higher dielectric constant than the first insulation film, a drain electrode which is electrically connected to the drain layer, and a source electrode electrically connected to the source layer.Type: ApplicationFiled: June 26, 2013Publication date: July 31, 2014Inventors: Nobuyuki SATO, Kentaro ICHINOSEKI
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Publication number: 20140167145Abstract: According to one embodiment, the semiconductor device is provided with a first semiconductor layer, a second semiconductor layer, a third semiconductor layer, a pair of first conductors, a pair of second conductors, first wiring layers, and second wiring layers. Each pair of first and second conductors is formed in first and second trenches via the first and second insulating films and is opposite to the first semiconductor layer and the second semiconductor layer. The first wiring layers have main body parts and plural convex parts. Plural convex parts extend from the main body parts and are electrically connected with the first conductors via a first opening part of a first interlayer insulating film. The second wiring layers are electrically connected with the second conductors via a second opening part of the first interlayer insulating film.Type: ApplicationFiled: July 10, 2013Publication date: June 19, 2014Inventor: Kentaro ICHINOSEKI
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Publication number: 20130113039Abstract: A semiconductor device provides a MOSFET having first and second regions. In the first region, a plurality of unit cells of the MOSFET device are provided. At the end of the plurality of the unit cells, a termination cell is provided. An n type layer underlies the unit cells, between the unit cells and an underlying electrode. In the unit cell region, this n doped layer is dually doped with impurities at two different densities, whereas, adjacent the termination cell, a different paradigm is provided. In one aspect, only one of the two n doped layers extends along a side of the termination cell. In a second aspect, the termination unit is in contact with an oppositely doped layer as compared to the impurities in the dual doped layer. In this way, breakdown voltage may be maintained while on-resistance is simultaneously reduced.Type: ApplicationFiled: September 7, 2012Publication date: May 9, 2013Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Takeru MATSUOKA, Kentaro ICHINOSEKI, Shigeaki HAYASE, Nobuyuki SATO
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Publication number: 20130069150Abstract: According to one embodiment, a semiconductor device includes a semiconductor layer; a plurality of semiconductor regions; second semiconductor region; a first electrode being positioned between the plurality of first semiconductor regions, the first electrode contacting with the semiconductor layer, each of the plurality of first semiconductor regions, and the second semiconductor region via a first insulating film; a second electrode provided below the first electrode, and contacting with the semiconductor layer via a second insulating film; an insulating layer interposed between the first electrode and the second electrode; a third electrode electrically connected to the semiconductor layer; and a fourth electrode connected to the second semiconductor region. The first electrode has a first portion and a pair of second portions. And each of the pair of second portions is provided along the first insulating film.Type: ApplicationFiled: September 13, 2012Publication date: March 21, 2013Applicant: Kabushiki Kaisha ToshibaInventors: Takeru MATSUOKA, Nobuyuki Sato, Shigeaki Hayase, Kentaro Ichinoseki