Patents by Inventor Kentaro Morito

Kentaro Morito has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10069206
    Abstract: A variable capacitance device includes: capacitors coupled in series between first and second signal terminal electrodes, each of the capacitors having a dielectric layer, a lower electrode and an upper electrode, a permittivity of the dielectric layer changing according to a voltage applied to the dielectric layer, the lower and upper electrodes sandwiching the dielectric layer; resistance films coupled between the capacitors and a bias terminal electrode; a first insulating film that contacts the resistance films; and a second insulating film that covers the capacitors, the resistance films and the first insulating film, wherein: a thermal conductivity of the first insulating film is larger than that of the second insulating film; and at least one of the resistance films has a pair of connection patterns provided on both ends thereof and resistance patterns that are coupled in parallel between the connection patterns.
    Type: Grant
    Filed: March 15, 2017
    Date of Patent: September 4, 2018
    Assignee: TAIYO YUDEN CO., LTD.
    Inventors: Daiki Ishii, Kentaro Morito
  • Patent number: 10044105
    Abstract: A variable capacitance device includes: (A) a first signal line that contains multiple first variable capacitance elements connected in series; (B) a second signal line that contains multiple second variable capacitance elements connected in series; (C) a first bias line used for applying a first direct-current voltage to each of the multiple first variable capacitance elements and multiple second variable capacitance elements; and (D) a second bias line used for applying a second direct-current voltage to each of the multiple first variable capacitance elements and multiple second variable capacitance elements. And, a part of at least one of the first bias line and second bias line is arranged so that it passes between two adjacent first variable capacitance elements among the multiple first variable capacitance elements.
    Type: Grant
    Filed: October 3, 2014
    Date of Patent: August 7, 2018
    Assignee: TAIYO YUDEN CO., LTD.
    Inventors: Kentaro Morito, Daiki Ishii, Masashi Natsume, Tomokazu Ikenaga
  • Patent number: 10008999
    Abstract: A control device according to the present invention is provided with (A) a variable capacitance device including a variable capacitance element, and (B) a control unit configured to apply a control voltage with a first polarity to the variable capacitance device during a third period including a first period to perform communication using the variable capacitance device and a second period not to perform communication before the first period, and configured to apply a control voltage with a second polarity opposite to the first polarity to the variable capacitance device during a sixth period including a fourth period to perform communication and a fifth period not to perform communication before the fourth period.
    Type: Grant
    Filed: June 13, 2016
    Date of Patent: June 26, 2018
    Assignees: TAIYO YUDEN CO., LTD., DEXERIALS CORPORATION
    Inventors: Kentaro Morito, Masayoshi Kanno
  • Publication number: 20180006377
    Abstract: A variable capacitance device includes: capacitors coupled in series between first and second signal terminal electrodes, each of the capacitors having a dielectric layer, a lower electrode and an upper electrode, a permittivity of the dielectric layer changing according to a voltage applied to the dielectric layer, the lower and upper electrodes sandwiching the dielectric layer; resistance films coupled between the capacitors and a bias terminal electrode; a first insulating film that contacts the resistance films; and a second insulating film that covers the capacitors, the resistance films and the first insulating film, wherein: a thermal conductivity of the first insulating film is larger than that of the second insulating film; and at least one of the resistance films has a pair of connection patterns provided on both ends thereof and resistance patterns that are coupled in parallel between the connection patterns.
    Type: Application
    Filed: March 15, 2017
    Publication date: January 4, 2018
    Applicant: TAIYO YUDEN CO., LTD.
    Inventors: Daiki ISHII, Kentaro MORITO
  • Patent number: 9730324
    Abstract: A variable capacitance device includes: a supporting substrate having a plurality of variable capacitance elements formed thereon, the plurality of variable capacitance elements being connected in series, wherein each of the plurality of variable capacitance elements has a separate lower electrode, or at least some of the plurality of variable capacitance elements share a lower electrode, thereby forming a plural set of the lower electrodes that serves as the lower electrodes of the respective variable capacitance elements, wherein the variable capacitance device further includes an insulating moisture-resistant film and a conductive adhesive film, and wherein the conductive adhesive film and the insulating moisture-resistant film have a gap in a plan view between at least some of regions where the plural set of the lower electrodes are respectively formed so as to avoid electrical leakage between said at least some of regions through the conductive adhesive film.
    Type: Grant
    Filed: August 24, 2015
    Date of Patent: August 8, 2017
    Assignee: TAIYO YUDEN CO., LTD.
    Inventors: Daiki Ishii, Kentaro Morito, Tomokazu Ikenaga
  • Patent number: 9722013
    Abstract: A thin film electronic component includes: a substrate; a thin film electrode layer over the substrate; an inorganic insulation layer formed on the thin film electrode layer; an organic insulation layer formed on the inorganic insulation layer; and a lead-out electrode that electrically connects to the thin film electrode layer. The inorganic insulation layer has a through-hole formed therein, so as to expose a portion of the thin film electrode layer. The organic insulation layer has a through-hole formed therein, so as to expose the through-hole in the inorganic insulation layer. The lead-out electrode is formed in the through-hole in the inorganic insulation layer and the through-hole in the organic insulation layer. A shape of a borderline defining the through-hole at a top surface of the organic insulation layer in a plan view has chamfered corners.
    Type: Grant
    Filed: August 25, 2015
    Date of Patent: August 1, 2017
    Assignee: TAIYO YUDEN CO., LTD.
    Inventors: Kentaro Morito, Daiki Ishii
  • Patent number: 9590677
    Abstract: A variable capacitance device includes: a first and second terminal for signals; a plural, even number of variable capacitance elements connected in-series between the first and second terminal; a third and fourth terminal for receiving a same voltage; a fifth and sixth terminal for grounding; a plurality of first resistors connected to either the third or fourth terminal on one end; and a plurality of second resistors connected to either the fifth or sixth terminal on one end. With respect to a series of successive nodes beginning with the first terminal and ending with the second terminal, respective other ends of a pair of the first resistors are connected to every other node, and respective other ends of a pair of the second resistors are connected to the remaining every other node, such that the pairs of first and second resistors are alternately connected to the series of successive nodes.
    Type: Grant
    Filed: November 13, 2015
    Date of Patent: March 7, 2017
    Assignee: TAIYO YUDEN CO., LTD.
    Inventors: Tomokazu Ikenaga, Daiki Ishii, Kentaro Morito
  • Publication number: 20160294349
    Abstract: A control device according to the present invention is provided with (A) a variable capacitance device including a variable capacitance element, and (B) a control unit configured to apply a control voltage with a first polarity to the variable capacitance device during a third period including a first period to perform communication using the variable capacitance device and a second period not to perform communication before the first period, and configured to apply a control voltage with a second polarity opposite to the first polarity to the variable capacitance device during a sixth period including a fourth period to perform communication and a fifth period not to perform communication before the fourth period.
    Type: Application
    Filed: June 13, 2016
    Publication date: October 6, 2016
    Inventors: Kentaro MORITO, Masayoshi KANNO
  • Publication number: 20160254599
    Abstract: A variable capacitance device includes: (A) a first signal line that contains multiple first variable capacitance elements connected in series; (B) a second signal line that contains multiple second variable capacitance elements connected in series; (C) a first bias line used for applying a first direct-current voltage to each of the multiple first variable capacitance elements and multiple second variable capacitance elements; and (D) a second bias line used for applying a second direct-current voltage to each of the multiple first variable capacitance elements and multiple second variable capacitance elements. And, a part of at least one of the first bias line and second bias line is arranged so that it passes between two adjacent first variable capacitance elements among the multiple first variable capacitance elements.
    Type: Application
    Filed: October 3, 2014
    Publication date: September 1, 2016
    Inventors: Kentaro MORITO, Daiki ISHII, Masashi NATSUME, Tomokazu IKENAGA
  • Publication number: 20160142105
    Abstract: A variable capacitance device includes: a first and second terminal for signals; a plural, even number of variable capacitance elements connected in-series between the first and second terminal; a third and fourth terminal for receiving a same voltage; a fifth and sixth terminal for grounding; a plurality of first resistors connected to either the third or fourth terminal on one end; and a plurality of second resistors connected to either the fifth or sixth terminal on one end. With respect to a series of successive nodes beginning with the first terminal and ending with the second terminal, respective other ends of a pair of the first resistors are connected to every other node, and respective other ends of a pair of the second resistors are connected to the remaining every other node, such that the pairs of first and second resistors are alternately connected to the series of successive nodes.
    Type: Application
    Filed: November 13, 2015
    Publication date: May 19, 2016
    Applicant: TAIYO YUDEN CO., LTD.
    Inventors: Tomokazu IKENAGA, Daiki ISHII, Kentaro MORITO
  • Publication number: 20160064473
    Abstract: A thin film electronic component includes: a substrate; a thin film electrode layer over the substrate; an inorganic insulation layer formed on the thin film electrode layer; an organic insulation layer formed on the inorganic insulation layer; and a lead-out electrode that electrically connects to the thin film electrode layer. The inorganic insulation layer has a through-hole formed therein, so as to expose a portion of the thin film electrode layer. The organic insulation layer has a through-hole formed therein, so as to expose the through-hole in the inorganic insulation layer. The lead-out electrode is formed in the through-hole in the inorganic insulation layer and the through-hole in the organic insulation layer. A shape of a borderline defining the through-hole at a top surface of the organic insulation layer in a plan view has chamfered corners.
    Type: Application
    Filed: August 25, 2015
    Publication date: March 3, 2016
    Applicant: TAIYO YUDEN CO., LTD.
    Inventors: Kentaro MORITO, Daiki ISHII
  • Publication number: 20160064148
    Abstract: A variable capacitance device includes: a supporting substrate having a plurality of variable capacitance elements formed thereon, the plurality of variable capacitance elements being connected in series, wherein each of the plurality of variable capacitance elements has a separate lower electrode, or at least some of the plurality of variable capacitance elements share a lower electrode, thereby forming a plural set of the lower electrodes that serves as the lower electrodes of the respective variable capacitance elements, wherein the variable capacitance device further includes an insulating moisture-resistant film and a conductive adhesive film, and wherein the conductive adhesive film and the insulating moisture-resistant film have a gap in a plan view between at least some of regions where the plural set of the lower electrodes are respectively formed so as to avoid electrical leakage between said at least some of regions through the conductive adhesive film.
    Type: Application
    Filed: August 24, 2015
    Publication date: March 3, 2016
    Applicant: TAIYO YUDEN CO., LTD.
    Inventors: Daiki ISHII, Kentaro MORITO, Tomokazu IKENAGA
  • Patent number: 8520364
    Abstract: An object of the present invention is to provide a multi-layer ceramic capacitor that includes a laminated block 4 formed by laminating ceramic dielectric layers 2 and internal electrodes 3 alternately, a pair of cover layers 5 laminated on top and bottom of the laminated block, a ceramic body 6 formed on both side surfaces of the laminated block 4, and a pair of external electrodes 7 electrically connected to the internal electrodes 3 and that can effectively prevent an occurrence of a crack. In the multi-layer ceramic capacitor 1, a silicate crystal made of an oxide including Ba and Si or a silicate crystal made of an oxide including Ti and Si is formed in boundary portions between the laminated block 4 and the ceramic bodies 6.
    Type: Grant
    Filed: April 10, 2012
    Date of Patent: August 27, 2013
    Assignee: Taiyo Yuden Co., Ltd.
    Inventor: Kentaro Morito
  • Publication number: 20130100579
    Abstract: An object of the present invention is to provide a multi-layer ceramic capacitor that includes a laminated block 4 formed by laminating ceramic dielectric layers 2 and internal electrodes 3 alternately, a pair of cover layers 5 laminated on top and bottom of the laminated block, a ceramic body 6 formed on both side surfaces of the laminated block 4, and a pair of external electrodes 7 electrically connected to the internal electrodes 3 and that can effectively prevent an occurrence of a crack. In the multi-layer ceramic capacitor 1, a silicate crystal made of an oxide including Ba and Si or a silicate crystal made of an oxide including Ti and Si is formed in boundary portions between the laminated block 4 and the ceramic bodies 6.
    Type: Application
    Filed: April 10, 2012
    Publication date: April 25, 2013
    Applicant: TAIYO YUDEN CO., LTD.
    Inventor: Kentaro Morito
  • Patent number: 6824898
    Abstract: A lattice strain(s) due to lattice mismatch can be effectively utilized and it is further designed for the reduction of leakage current and the improvement of fatigue characteristic. Substantially one layer of {X3}O corresponding to one atomic layer of {X3}O is inserted at suitable intervals while epitaxially growing perovskite oxides or {X1}{X2}O3 layers 12 on a substrate which is similar in crystallographic structure to a desired thin film. {X1} and {X3} are each Ca or the like, {X2} is Ti or the like and ┌O┘ is oxygen. While the {X3}O layer(s) 14 is introduced so as to divide the perovskite structure of the {X1}{X2}O3 layers 12, it is present in a condition exhibiting an extremely high structural matching with the perovskite structure thereby forming a layered perovskite structure.
    Type: Grant
    Filed: June 12, 2003
    Date of Patent: November 30, 2004
    Assignee: Taiyo Yuden Co., Ltd.
    Inventors: Toshimasa Suzuki, Yoshiki Iwazaki, Kentaro Morito, Shoichi Sekiguchi, Masayuki Fujimoto
  • Publication number: 20030211741
    Abstract: A lattice strain(s) due to lattice mismatch can be effectively utilized and it is further designed for the reduction of leakage current and the improvement of fatigue characteristic.
    Type: Application
    Filed: June 12, 2003
    Publication date: November 13, 2003
    Applicant: TAIYO YUDEN CO., LTD.
    Inventors: Toshimasa Suzuki, Yoshiki Iwazaki, Kentaro Morito, Shoichi Sekiguchi, Masayuki Fujimoto