Abstract: A light detector is configured such that a light receiving portion having APDs and a peripheral portion are provided on a first principal surface of a p-type semiconductor substrate, and further includes a back electrode provided on a second principal surface of the semiconductor substrate and a p-type first separation portion provided between the light receiving portion and the peripheral portion. The APD has, on a first principal surface side, an n-type region and a p-epitaxial layer contacting the n-type region in a Z-direction. The peripheral portion has an n-type MISFET provided at a p-well and an n-well provided to surround entire side and bottom portions of the p-well.

Abstract: A driving assistance control section of a vehicle control apparatus has an operation state of a driver's vehicle transition from a stop state to a start-stand-by state keeping a second assistance state, if an accelerating operation larger than a predetermined first threshold acceleration is performed and there is an ahead-located vehicle, and has the driving assistance state transition from the second assistance state to a first assistance state and has the operation state transition from the stop state to the start-stand-by state if an accelerating operation larger than a predetermined second threshold acceleration is performed over a longer time than a predetermined threshold duration and there is an ahead-located vehicle, if follow-up running control is being performed in the second assistance state in which it is not necessary for a driver to hold a steering wheel to continue to have a driving assistance function performed.

Abstract: A light detector is configured such that a light receiving portion having APDs and a peripheral circuit portion are provided on a first principal surface of a p-type semiconductor substrate, and further includes a back electrode provided on a second principal surface of the semiconductor substrate and a p-type first separation portion provided between the light receiving portion and the peripheral circuit portion. The APD has, on a first principal surface side, an n-type region and a p-epitaxial layer contacting the n-type region in a Z-direction. The peripheral circuit portion has an n-type MISFET provided at a p-well and an n-well provided to surround side and bottom portions of the p-well.

Abstract: A semiconductor device includes a semiconductor substrate a pixel region in which an APD is disposed, and a logic region different from the pixel region; a transistor which is disposed in the logic region and includes a sidewall made of an insulating material; an anti-reflective film which is disposed above a main surface of the semiconductor substrate in the pixel region and is made of the insulating material; and a first liner film which is disposed above the main surface of the semiconductor substrate in the logic region and is made of the insulating material. The anti-reflective film and the first liner film are integrally formed. The thickness of the anti-reflective film is larger than or equal to the sum of the thickness of the sidewall and the thickness of the first liner film.

Abstract: A light detector is configured such that a light receiving portion having APDs and a peripheral circuit portion are provided on a first principal surface of a p-type semiconductor substrate, and further includes a back electrode provided on a second principal surface of the semiconductor substrate and a p-type first separation portion provided between the light receiving portion and the peripheral circuit portion. The APD has, on a first principal surface side, an n-type region and a p-epitaxial layer contacting the n-type region in a Z-direction. The peripheral circuit portion has an n-type MISFET provided at a p-well and an n-well provided to surround side and bottom portions of the p-well.

Abstract: A solid-state image sensor includes a pixel array including pixel cells arranged in a matrix. Each of the pixel cells includes an avalanche photodiode, a floating diffusion which accumulates charges, a transfer transistor which connects a cathode of the avalanche photodiode to the floating diffusion, a first reset transistor for resetting charges collected in the cathode of the avalanche photodiode, a second reset transistor for resetting charges accumulated in the floating diffusion, an amplification transistor for converting a charge amount of charges accumulated in the floating diffusion into a voltage, a memory which accumulates charges, and a count transistor which connects the floating diffusion to the memory.

Abstract: A solid-state image sensor includes a pixel array including pixel cells arranged in a matrix. Each of the pixel cells includes an avalanche photodiode, a floating diffusion which accumulates charges, a transfer transistor which connects a cathode of the avalanche photodiode to the floating diffusion, a first reset transistor for resetting charges collected in the cathode of the avalanche photodiode, a second reset transistor for resetting charges accumulated in the floating diffusion, an amplification transistor for converting a charge amount of charges accumulated in the floating diffusion into a voltage, a memory which accumulates charges, and a count transistor which connects the floating diffusion to the memory.

Abstract: An electronic component-use package includes a base that holds an electronic component element, and terminal electrodes formed on a bottom surface of the base. The terminal electrodes have chamfered parts facing corner parts of the base bottom surface and having angles of chamfer ranging in ±10 degrees to a reference line. The reference line is a perpendicular line to a straight line that connects the corner parts of the base bottom surface to a central part on one side of the terminal electrode in proximity to a center point of the base bottom surface, the reference line L8 passing through the chamfered parts.

Abstract: A piezoelectric device is provided with a rectangular crystal piece having driving electrodes on front and back main faces thereof, and a base member having two electrode pads near one short side of the crystal piece. The crystal piece is supported on the base member by two support portions near one short side thereof, and by an auxiliary support portion on the other short side thereof. A position of the auxiliary support portion relative to the other short side, where L is a distance between two short sides, and H is a distance from the other short side to a peripheral edge of the auxiliary support portion nearest to the other short side, is set to a position at which the distance H stays in a range of distances in which a maximum tensile stress acting on the auxiliary support portion and a maximum von Mises stress of the crystal piece are within predetermined ranges.

Abstract: A solid-state imaging device includes unit pixels formed on a semiconductor substrate. Each of the unit pixels includes a photoelectric converter, a floating diffusion, a pinning layer, and a pixel transistor. The pixel transistor includes a gate electrode formed on the semiconductor substrate, a source diffusion layer, and a drain diffusion layer. At least one of the source diffusion layer or the drain diffusion layer functions as the floating diffusion. The pinning layer is covered by the floating diffusion at a bottom and a side at a channel of the pixel transistor. A conductivity type of the floating diffusion is opposite to that of the pinning layer.

Abstract: An electronic component-use package includes a base that holds an electronic component element, and terminal electrodes formed on a bottom surface of the base. The terminal electrodes have chamfered parts facing corner parts of the base bottom surface and having angles of chamfer ranging in ±10 degrees to a reference line. The reference line is a perpendicular line to a straight line that connects the corner parts of the base bottom surface to a central part on one side of the terminal electrode in proximity to a center point of the base bottom surface, the reference line L8 passing through the chamfered parts.

Abstract: A piezoelectric device is provided with a rectangular crystal piece having driving electrodes on front and back main faces thereof, and a base member having two electrode pads near one short side of the crystal piece. The crystal piece is supported on the base member by two support portions near one short side thereof, and by an auxiliary support portion on the other short side thereof. A position of the auxiliary support portion relative to the other short side, where L is a distance between two short sides, and H is a distance from the other short side to a peripheral edge of the auxiliary support portion nearest to the other short side, is set to a position at which the distance H stays in a range of distances in which a maximum tensile stress acting on the auxiliary support portion and a maximum von Mises stress of the crystal piece are within predetermined ranges.

Abstract: An AT-cut quartz plate having chamfered ridge portions and an almost rectangular shape in planar view, wherein a resonance frequency is equal to or larger than 7 MHz and equal to or smaller than 9 MHz, lengths of long and short sides of the rectangular shape are equal to or larger than 1.5 mm and equal to or smaller than 2.4 mm, and equal to or larger than a frequency difference between primary vibration and sub-vibration is equal to or larger than 975 kHz and equal to or smaller than 1,015 kHz.

Abstract: A solid-state imaging device includes unit pixels formed on a semiconductor substrate. Each of the unit pixels includes a photoelectric converter, a floating diffusion, a pinning layer, and a pixel transistor. The pixel transistor includes a gate electrode formed on the semiconductor substrate, a source diffusion layer, and a drain diffusion layer. At least one of the source diffusion layer or the drain diffusion layer functions as the floating diffusion. The pinning layer is covered by the floating diffusion at a bottom and a side at a channel of the pixel transistor. A conductivity type of the floating diffusion is opposite to that of the pinning layer.

Abstract: An AT-cut quartz plate having chamfered ridge portions and an almost rectangular shape in planar view, wherein a resonance frequency is equal to or larger than 7 MHz and equal to or smaller than 9 MHz, lengths of long and short sides of the rectangular shape are equal to or larger than 1.5 mm and equal to or smaller than 2.4 mm, and equal to or larger than a frequency difference between primary vibration and sub-vibration is equal to or larger than 975 kHz and equal to or smaller than 1,015 kHz.

Abstract: An electronic component package has a base in the shape of a rectangle as viewed from the top, and a metal lid. A terminal electrode on a base bottom surface and a circuit substrate are joined using a conductive adhesive material. In the electronic component package, a first terminal electrode group including two or more terminal electrodes formed in parallel is formed eccentrically to one corner position of the base bottom surface, and a single second terminal electrode, or a second terminal electrode group including two or more terminal electrodes formed in parallel, is formed eccentrically only to a first diagonal position diagonally opposite the one corner position. Also, no-electrode regions in which no terminal electrode is formed along a short side of the base are provided at another corner position facing the one corner position in a short side direction of the base, and a second diagonal position diagonally opposite the other corner position.

Abstract: A semiconductor device includes an n-type MIS transistor and a p-type MIS transistor. The n-type MIS transistor includes a first gate electrode formed on a first active region and a first sidewall formed on the side face of the first gate electrode. The p-type MIS transistor includes a second gate electrode formed on a second active region, a second sidewall formed on the side face of the second gate electrode and strain layers formed in the second active region. The second sidewall has a smaller thickness than the first sidewall.

Abstract: A semiconductor device includes an n-type MIS transistor and a p-type MIS transistor. The n-type MIS transistor includes a first gate electrode formed on a first active region and a first sidewall formed on the side face of the first gate electrode. The p-type MIS transistor includes a second gate electrode formed on a second active region, a second sidewall formed on the side face of the second gate electrode and strain layers formed in the second active region. The second sidewall has a smaller thickness than the first sidewall.

Abstract: An electronic component package has a base in the shape of a rectangle as viewed from the top, and a metal lid. A terminal electrode on a base bottom surface and a circuit substrate are joined using a conductive adhesive material. In the electronic component package, a first terminal electrode group including two or more terminal electrodes formed in parallel is formed eccentrically to one corner position of the base bottom surface, and a single second terminal electrode, or a second terminal electrode group including two or more terminal electrodes formed in parallel, is formed eccentrically only to a first diagonal position diagonally opposite the one corner position. Also, no-electrode regions in which no terminal electrode is formed along a short side of the base are provided at another corner position facing the one corner position in a short side direction of the base, and a second diagonal position diagonally opposite the other corner position.

Abstract: A semiconductor device includes an n-type MIS transistor and a p-type MIS transistor. The n-type MIS transistor includes a first gate electrode formed on a first active region and a first sidewall formed on the side face of the first gate electrode. The p-type MIS transistor includes a second gate electrode formed on a second active region, a second sidewall formed on the side face of the second gate electrode and strain layers formed in the second active region. The second sidewall has a smaller thickness than the first sidewall.