Patents by Inventor Kentaro Ohta

Kentaro Ohta has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12222207
    Abstract: According to the present disclosure, a map matching apparatus includes a map information acquisition unit configured to acquire map information expressed by a plurality of links, a movement information acquisition unit configured to acquire movement information of a moving body on a predetermined route, and a matching unit configured to specify a link string, which is a string of the links corresponding to the route, based on the map information and the movement information, in which the matching unit is configured to generate a physical network, which is a road network, based on the connection relationship and the map information, generate a hierarchical logical network in which the physical network is duplicated in a plurality of layers and configured in a hierarchical manner, and specify the link string indicating a minimized cost in the hierarchical logical network.
    Type: Grant
    Filed: March 24, 2020
    Date of Patent: February 11, 2025
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Kentaro Daikoku, Yuko Ohta
  • Patent number: 6541308
    Abstract: A process for producing a semiconductor package and a structure thereof are provided in that yield per unit wafer is increased, yield and reliability are improved, and the number of production steps are decreased. The process includes the steps of a step of forming a bump on a semiconductor wafer for respective semiconductor chip constituting a semiconductor package; a step of dicing a substrate, which has been prepared, into a substrate piece corresponding to the respective semiconductor chip; a step of die-boding the substrate piece, which has been diced, on the semiconductor wafer with making the bump to correspond to the respective semiconductor chip; a step of sealing a gap between the semiconductor wafer and the substrate piece, which have been die-bonded, with a resin; and a step of dicing the semiconductor wafer and the substrate piece, which have been sealed with the resin, into the respective semiconductor package.
    Type: Grant
    Filed: September 1, 1999
    Date of Patent: April 1, 2003
    Assignee: Sony Corporation
    Inventors: Mutsuyoshi Ito, Kentaro Ohta
  • Publication number: 20020043705
    Abstract: To provide a semiconductor device and its manufacturing method capable of enhancing the mounting strength.
    Type: Application
    Filed: December 6, 2001
    Publication date: April 18, 2002
    Inventors: Mutsuyoshi Ito, Hisao Ogura, Kentaro Ohta, Kazuhiko Ishino
  • Publication number: 20020001966
    Abstract: A process for producing a semiconductor package and a structure thereof are provided in that yield per unit wafer is increased, yield and reliability are improved, and the number of production steps are decreased. The process includes the steps of a step of forming a bump on a semiconductor wafer for respective semiconductor chip constituting a semiconductor package; a step of dicing a substrate, which has been prepared, into a substrate piece corresponding to the respective semiconductor chip; a step of die-boding the substrate piece, which has been diced, on the semiconductor wafer with making the bump to correspond to the respective semiconductor chip; a step of sealing a gap between the semiconductor wafer and the substrate piece, which have been die-bonded, with a resin; and a step of dicing the semiconductor wafer and the substrate piece, which have been sealed with the resin, into the respective semiconductor package.
    Type: Application
    Filed: September 1, 1999
    Publication date: January 3, 2002
    Inventors: MUTSUYOSHI ITO, KENTARO OHTA