Patents by Inventor Kentaro Umesawa
Kentaro Umesawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11782612Abstract: A memory system includes a nonvolatile memory and a controller that controls the nonvolatile memory. The controller is configured to generate information relating to encryption and decryption of data based on a location of the memory system and to enable at least one process of encrypting data to be written to the nonvolatile memory or decrypting data read from the nonvolatile memory by using the information.Type: GrantFiled: August 24, 2021Date of Patent: October 10, 2023Assignee: Kioxia CorporationInventors: Hirotomo Kobayashi, Yoshiyuki Kudoh, Kentaro Umesawa
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Patent number: 11775184Abstract: According to one embodiment, a memory system includes a first nonvolatile memory, a second nonvolatile memory and a controller. The first nonvolatile memory includes a first memory element. The second nonvolatile memory includes a second memory element in which data is able to be written only once. The second memory element stores first key information. The controller receives second key information stored in an information processing apparatus, generates a first key using the first key information and the second key information, and generates a second key using at least the first key. The controller encrypts data, which is to be written into the first nonvolatile memory, with the second key, and decrypts data, which is read from the first nonvolatile memory, with the second key.Type: GrantFiled: September 10, 2020Date of Patent: October 3, 2023Assignee: Kioxia CorporationInventors: Kentaro Umesawa, Teruji Yamakawa
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Publication number: 20230033947Abstract: A memory system comprising a first storage region which stores first firmware corresponding to an external first electronic control apparatus; a second storage region which stores second firmware corresponding to an external gateway and third firmware corresponding to the first electronic control apparatus; and a controller configured to transmit the second firmware and the third firmware to the gateway on the basis of a first command received from the gateway, and transmit the first firmware to the gateway on the basis of a second command received from the gateway.Type: ApplicationFiled: October 4, 2022Publication date: February 2, 2023Applicant: KIOXIA CORPORATIONInventors: Atsushi YAMAZAKI, Kentaro UMESAWA, Naoko YAMADA, Yuta KAGEYAMA
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Patent number: 11494104Abstract: A memory system comprising a first storage region which stores first firmware corresponding to an external first electronic control apparatus; a second storage region which stores second firmware corresponding to an external gateway and third firmware corresponding to the first electronic control apparatus; and a controller configured to transmit the second firmware and the third firmware to the gateway on the basis of a first command received from the gateway, and transmit the first firmware to the gateway on the basis of a second command received from the gateway.Type: GrantFiled: July 30, 2019Date of Patent: November 8, 2022Assignee: KIOXIA CORPORATIONInventors: Atsushi Yamazaki, Kentaro Umesawa, Naoko Yamada, Yuta Kageyama
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Patent number: 11455115Abstract: According to one embodiment, a storage device includes a nonvolatile memory and a controller. The controller is configured to control data write to the nonvolatile memory and data read from the nonvolatile memory based on a command from a host. The controller includes at least one processor. The nonvolatile memory stores first firmware for normal operation and second firmware for recovery. The first firmware is firmware to cause the at least one processor to control the data write and the data read based on the command. The second firmware is firmware to cause the at least one processor to recover the first firmware. The second firmware is stored in the nonvolatile memory with higher reliability than the first firmware.Type: GrantFiled: February 28, 2020Date of Patent: September 27, 2022Assignee: Kioxia CorporationInventors: Junpei Futagi, Kentaro Umesawa
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Publication number: 20220091759Abstract: A memory system includes a nonvolatile memory and a controller that controls the nonvolatile memory. The controller is configured to generate information relating to encryption and decryption of data based on a location of the memory system and to enable at least one process of encrypting data to be written to the nonvolatile memory or decrypting data read from the nonvolatile memory by using the information.Type: ApplicationFiled: August 24, 2021Publication date: March 24, 2022Inventors: Hirotomo KOBAYASHI, Yoshiyuki KUDOH, Kentaro UMESAWA
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Patent number: 11216390Abstract: A storage device includes a storage and a controller. The controller can control data write to the storage and data read from the storage. The controller includes a first processor, a second processor, a first bus, a memory access control device, and a second bus. The memory access control device can manage a memory access control information table. The memory access control information table stores access control information indicating a range of each of areas of the memory and an identifier associated with each area. The memory access control device can compare the identifier output to the first bus with the identifier in the memory access control information table, and determine whether to allow the access to the memory requested by the second processor.Type: GrantFiled: February 26, 2020Date of Patent: January 4, 2022Assignee: Kioxia CorporationInventors: Masahiko Motoyama, Kentaro Umesawa, Shintaro Haba
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Publication number: 20210223968Abstract: According to one embodiment, a memory system includes a first nonvolatile memory, a second nonvolatile memory and a controller. The first nonvolatile memory includes a first memory element. The second nonvolatile memory includes a second memory element in which data is able to be written only once. The second memory element stores first key information. The controller receives second key information stored in an information processing apparatus, generates a first key using the first key information and the second key information, and generates a second key using at least the first key. The controller encrypts data, which is to be written into the first nonvolatile memory, with the second key, and decrypts data, which is read from the first nonvolatile memory, with the second key.Type: ApplicationFiled: September 10, 2020Publication date: July 22, 2021Applicant: Kioxia CorporationInventors: Kentaro UMESAWA, Teruji YAMAKAWA
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Publication number: 20210042035Abstract: According to one embodiment, a storage device includes a nonvolatile memory and a controller. The controller is configured to control data write to the nonvolatile memory and data read from the nonvolatile memory based on a command from a host. The controller includes at least one processor. The nonvolatile memory stores first firmware for normal operation and second firmware for recovery. The first firmware is firmware to cause the at least one processor to control the data write and the data read based on the command. The second firmware is firmware to cause the at least one processor to recover the first firmware. The second firmware is stored in the nonvolatile memory with higher reliability than the first firmware.Type: ApplicationFiled: February 28, 2020Publication date: February 11, 2021Applicant: Kioxia CorporationInventors: Junpei FUTAGI, Kentaro UMESAWA
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Publication number: 20210026787Abstract: A storage device includes a storage and a controller. The controller can control data write to the storage and data read from the storage. The controller includes a first processor, a second processor, a first bus, a memory access control device, and a second bus. The memory access control device can manage a memory access control information table. The memory access control information table stores access control information indicating a range of each of areas of the memory and an identifier associated with each area. The memory access control device can compare the identifier output to the first bus with the identifier in the memory access control information table, and determine whether to allow the access to the memory requested by the second processor.Type: ApplicationFiled: February 26, 2020Publication date: January 28, 2021Applicant: KIOXIA CORPORATIONInventors: Masahiko MOTOYAMA, Kentaro UMESAWA, Shintaro HABA
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Publication number: 20200301598Abstract: A memory system comprising a first storage region which stores first firmware corresponding to an external first electronic control apparatus; a second storage region which stores second firmware corresponding to an external gateway and third firmware corresponding to the first electronic control apparatus; and a controller configured to transmit the second firmware and the third firmware to the gateway on the basis of a first command received from the gateway, and transmit the first firmware to the gateway on the basis of a second command received from the gateway.Type: ApplicationFiled: July 30, 2019Publication date: September 24, 2020Applicant: TOSHIBA MEMORY CORPORATIONInventors: Atsushi YAMAZAKI, Kentaro UMESAWA, Naoko YAMADA, Yuta KAGEYAMA
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Patent number: 10509568Abstract: An information processing apparatus includes a nonvolatile memory, a flag settable to a first value indicating that a program stored in a memory region of the nonvolatile memory has not been verified, and to a second value indicating that the program has been verified, a switching circuit configured to set the flag to the first value, in response to a request for permission to modify the program stored in the memory region, and a verification circuit that sets the flag to the second value upon verification of the program stored in the memory region, and upon restart of the information processing apparatus, carries out a verification process of the program prior to execution of the program if the first value is set in the flag, and executes the program without the verification process if the second value is set in the flag.Type: GrantFiled: September 1, 2016Date of Patent: December 17, 2019Assignee: KABUSHIKI KAISHA TOSHIBAInventors: Mikio Hashimoto, Kentaro Umesawa, Yoshiyuki Amanuma
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Patent number: 10437680Abstract: A relay apparatus according to an embodiment includes a request transmitting unit, a response receiving unit, and a data transmitting unit. The request transmitting unit transmits an acquisition request to a provision apparatus. The response receiving unit receives the second data from the provision apparatus in response to the acquisition request. The data transmitting unit transmits, to the electronic control unit, the second data received from the provision apparatus, thereby causing the electronic control unit to update the first data firstly stored therein with the second data. When the updating has failed, the data transmitting transmits the first data to the electronic control unit, thereby causing the electronic control unit to restore the first data.Type: GrantFiled: November 9, 2016Date of Patent: October 8, 2019Assignee: Kabushiki Kaisha ToshibaInventors: Toshiyuki Kito, Takeshi Kawabata, Kentaro Umesawa
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Patent number: 10380057Abstract: According to an embodiment, a data storage device includes a data accumulation unit, a bus interface, and a processor. The processor is configured to control operation of the data storage device so as to spontaneously acquire data from an in-vehicle network via the bus interface and store the data in the data accumulation unit. The processor includes a message processing unit and a data access processing unit. The message processing unit is configured to transmit and receive messages, via the bus interface, to and from an electronic control unit or an external device connected to the in-vehicle network. The data access processing unit is configured to command the data accumulation unit to write and read data. Data included in a message received by the message processing unit is written in the data accumulation unit in accordance with a command of the data access processing unit.Type: GrantFiled: August 24, 2017Date of Patent: August 13, 2019Assignee: Kabushiki Kaisha ToshibaInventors: Ryuta Nara, Hiroshi Isozaki, Kentaro Umesawa
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Patent number: 10229547Abstract: An in-vehicle gateway device according to an embodiment includes a storage unit, a plurality of internal communication processors, a routing processor and a storage controller. The storage unit stores therein data output by an electronic control unit included in the in-vehicle system. The internal communication processors include an internal communication processor to which at least one electronic control unit is connected. The routing processor transfers data among the internal communication processors and outputs at least a part of the transferred data to the storage unit in a form capable of being stored in the storage unit. The storage controller manipulates or filters, in accordance with a certain rule, at least one of the data to store in the storage unit and the data output from the storage unit.Type: GrantFiled: February 17, 2017Date of Patent: March 12, 2019Assignee: Kabushiki Kaisha ToshibaInventors: Hiroshi Isozaki, Taku Kato, Jun Kanai, Naoko Yamada, Kentaro Umesawa
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Publication number: 20180267922Abstract: According to an embodiment, a data storage device includes a data accumulation unit, a bus interface, and a processor. The processor is configured to control operation of the data storage device so as to spontaneously acquire data from an in-vehicle network via the bus interface and store the data in the data accumulation unit. The processor includes a message processing unit and a data access processing unit. The message processing unit is configured to transmit and receive messages, via the bus interface, to and from an electronic control unit or an external device connected to the in-vehicle network. The data access processing unit is configured to command the data accumulation unit to write and read data. Data included in a message received by the message processing unit is written in the data accumulation unit in accordance with a command of the data access processing unit.Type: ApplicationFiled: August 24, 2017Publication date: September 20, 2018Applicant: Kabushiki Kaisha ToshibaInventors: Ryuta NARA, Hiroshi ISOZAKI, Kentaro UMESAWA
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Publication number: 20170278320Abstract: An in-vehicle gateway device according to an embodiment includes a storage unit, a plurality of internal communication processors, a routing processor and a storage controller. The storage unit stores therein data output by an electronic control unit included in the in-vehicle system. The internal communication processors include an internal communication processor to which at least one electronic control unit is connected. The routing processor transfers data among the internal communication processors and outputs at least a part of the transferred data to the storage unit in a form capable of being stored in the storage unit. The storage controller manipulates or filters, in accordance with a certain rule, at least one of the data to store in the storage unit and the data output from the storage unit.Type: ApplicationFiled: February 17, 2017Publication date: September 28, 2017Applicant: Kabushiki Kaisha ToshibaInventors: Hiroshi ISOZAKI, Taku KATO, Jun KANAI, Naoko YAMADA, Kentaro UMESAWA
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Publication number: 20170255384Abstract: An information processing apparatus includes a nonvolatile memory, a flag settable to a first value indicating that a program stored in a memory region of the nonvolatile memory has not been verified, and to a second value indicating that the program has been verified, a switching circuit configured to set the flag to the first value, in response to a request for permission to modify the program stored in the memory region, and a verification circuit that sets the flag to the second value upon verification of the program stored in the memory region, and upon restart of the information processing apparatus, carries out a verification process of the program prior to execution of the program if the first value is set in the flag, and executes the program without the verification process if the second value is set in the flag.Type: ApplicationFiled: September 1, 2016Publication date: September 7, 2017Inventors: Mikio HASHIMOTO, Kentaro UMESAWA, Yoshiyuki AMANUMA
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Publication number: 20170139778Abstract: A relay apparatus according to an embodiment includes a request transmitting unit, a response receiving unit, and a data transmitting unit. The request transmitting unit transmits an acquisition request to a provision apparatus. The response receiving unit receives the second data from the provision apparatus in response to the acquisition request. The data transmitting unit transmits, to the electronic control unit, the second data received from the provision apparatus, thereby causing the electronic control unit to update the first data firstly stored therein with the second data. When the updating has failed, the data transmitting transmits the first data to the electronic control unit, thereby causing the electronic control unit to restore the first data.Type: ApplicationFiled: November 9, 2016Publication date: May 18, 2017Applicant: Kabushiki Kaisha ToshibaInventors: Toshiyuki KITO, Takeshi Kawabata, Kentaro Umesawa
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Publication number: 20170019399Abstract: An update processing is carried out on a terminal through communication with an external device connected therewith over a network. The terminal includes a processor configured to receive an update request from the external device, the update request including update data and challenge data, and a storage device in which original data to be updated and a private key are stored. The storage device is configured to update the original data using the update data and generate a digital signature of the challenge data using the private key. The processor is further configured to transmit the digital signature of the challenge data to the external device as a completion notification of the update processing.Type: ApplicationFiled: February 23, 2016Publication date: January 19, 2017Inventors: Atsushi YAMAZAKI, Kentaro UMESAWA, Teruji YAMAKAWA