Patents by Inventor Kentaro Yasunaka
Kentaro Yasunaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11711110Abstract: A communication system includes: a transmission device including a transmission data generator, a pattern generator, a transmitter, and a control signal receiver, the transmission data generator that is configured to generate transmission data, the pattern generator that is configured to generate an alternate pattern alternating at every lapse of a predetermined time, the transmitter that includes a first equalization circuit and is configured to transmit a transmission signal including the transmission data and the alternate pattern, the first equalization circuit that is configured to adjust equalization characteristics on the basis of first instruction information, and the control signal receiver that is configured to receive the first instruction information; and a reception device including a receiver, a first detector, and a control signal transmitter, the receiver that is configured to receive the transmission signal, the first detector that is configured to detect a frequency component corresponding tType: GrantFiled: October 3, 2019Date of Patent: July 25, 2023Assignee: Sony Semiconductor Solutions CorporationInventors: Takashi Masuda, Kentaro Yasunaka
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Publication number: 20210359716Abstract: A communication system includes: a transmission device including a transmission data generator, a pattern generator, a transmitter, and a control signal receiver, the transmission data generator that is configured to generate transmission data, the pattern generator that is configured to generate an alternate pattern alternating at every lapse of a predetermined time, the transmitter that includes a first equalization circuit and is configured to transmit a transmission signal including the transmission data and the alternate pattern, the first equalization circuit that is configured to adjust equalization characteristics on the basis of first instruction information, and the control signal receiver that is configured to receive the first instruction information; and a reception device including a receiver, a first detector, and a control signal transmitter, the receiver that is configured to receive the transmission signal, the first detector that is configured to detect a frequency component corresponding tType: ApplicationFiled: October 3, 2019Publication date: November 18, 2021Inventors: Takashi Masuda, Kentaro Yasunaka
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Patent number: 11025267Abstract: The present technology relates to a DAC (Digital to Analog Converter) and an oscillation circuit that allow widening of a range of a voltage to be output from the DAC. A plurality of first switches is connected to a voltage-dividing resistor and each configured to output, as a first voltage, a voltage at a corresponding one of connection points between the voltage-dividing resistor and the plurality of first switches. A plurality of second switches is connected to the voltage-dividing resistor and each configured to output, as a second voltage, a voltage at a corresponding one of connection points between the voltage-dividing resistor and the plurality of second switches. The present technology can be applied to, for example, a VCO (Voltage-Controlled Oscillator) and the like that oscillates a signal with a frequency according to a voltage to be output from a DAC.Type: GrantFiled: December 14, 2017Date of Patent: June 1, 2021Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Yoshinobu Kawasaki, Kentaro Yasunaka, Takashi Masuda
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Publication number: 20200091927Abstract: The present technology relates to a DAC (Digital to Analog Converter) and an oscillation circuit that allow widening of a range of a voltage to be output from the DAC. A plurality of first switches is connected to a voltage-dividing resistor and each configured to output, as a first voltage, a voltage at a corresponding one of connection points between the voltage-dividing resistor and the plurality of first switches. A plurality of second switches is connected to the voltage-dividing resistor and each configured to output, as a second voltage, a voltage at a corresponding one of connection points between the voltage-dividing resistor and the plurality of second switches. The present technology can be applied to, for example, a VCO (Voltage-Controlled Oscillator) and the like that oscillates a signal with a frequency according to a voltage to be output from a DAC.Type: ApplicationFiled: December 14, 2017Publication date: March 19, 2020Inventors: YOSHINOBU KAWASAKI, KENTARO YASUNAKA, TAKASHI MASUDA
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Publication number: 20190332566Abstract: The present technology relates to a communication apparatus and a communication method that enable an increase in the variation of modes of connection between electronic devices. Included are: a detected mechanism corresponding to a mechanism included in a second electronic device that receives a baseband signal outputted by a first electronic device, the detected mechanism being configured to, upon the first electronic device and the second electronic device being connected, be detected by the first electronic device, and be connected to the first electronic device; a connection unit configured to, upon a connection of the first and second electronic devices being detected, connect the detected mechanism to the first electronic device; and a millimeter-wave generation unit configured to generate a signal in a millimeter wave band obtained by converting frequency from the baseband signal outputted by the first electronic device to a signal in a higher frequency band than the baseband signal.Type: ApplicationFiled: December 28, 2017Publication date: October 31, 2019Inventors: KENTARO YASUNAKA, TAKASHI MASUDA
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Patent number: 10374598Abstract: A power on reset circuit according to the present disclosure includes: a reference voltage generating circuit that generates a reference voltage, and also outputs, as a control voltage, a voltage at a node at which a voltage rise is slower than the reference voltage; a comparison voltage generating circuit that operates in response to the control voltage output from the reference voltage generating circuit, and outputs a comparison voltage depending on a power source voltage; and a comparison circuit that compares the comparison voltage output from the comparison voltage generating circuit to the reference voltage output from the reference voltage generating circuit, and outputs an operation signal while the comparison voltage exceeds the reference voltage.Type: GrantFiled: August 6, 2015Date of Patent: August 6, 2019Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventor: Kentaro Yasunaka
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Publication number: 20170244406Abstract: A power on reset circuit according to the present disclosure includes: a reference voltage generating circuit that generates a reference voltage, and also outputs, as a control voltage, a voltage at a node at which a voltage rise is slower than the reference voltage; a comparison voltage generating circuit that operates in response to the control voltage output from the reference voltage generating circuit, and outputs a comparison voltage depending on a power source voltage; and a comparison circuit that compares the comparison voltage output from the comparison voltage generating circuit to the reference voltage output from the reference voltage generating circuit, and outputs an operation signal while the comparison voltage exceeds the reference voltage.Type: ApplicationFiled: August 6, 2015Publication date: August 24, 2017Inventor: KENTARO YASUNAKA
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Patent number: 9596750Abstract: An electronic circuit includes: a semiconductor chip provided with a single-ended I/F including a pad on which single-ended signals are exchanged; and a mounting unit on which a differential transmission path transmitting a differential signal is formed, and on which the semiconductor chip is mounted so that the pad of the single-ended I/F is directly electrically connected to a conductor configuring the differential transmission path.Type: GrantFiled: October 25, 2012Date of Patent: March 14, 2017Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Tomoari Itagaki, Kenichi Kawasaki, Kentaro Yasunaka
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Patent number: 7388891Abstract: PROBLEM TO BE SOLVED: to realize a wide bandwidth light source capable of a stable operation providing a less spectrum variation. SOLUTION: Optical pulses 202 outputted by this optical pulse-generating device 201 are split by optical coupler 210. The one of split optical pulses is inputted in white light-emitting device 204 to emit the white light having the wide bandwidth. The other split is inputted in optical band pass filter 212 in operation-stabilizing circuit 207. Optical detector 213 detects a signal level of a specific wavelength and input in feedback circuit 215 to generate first and second feedback signals 205 and 206. Ring resonator fiber laser 208 uses any one of them and controls a rotation angle of the waveplate to realize stabilization of the output.Type: GrantFiled: March 9, 2005Date of Patent: June 17, 2008Assignee: Santec CorporationInventors: Noboru Uehara, Yuichi Takushima, Kentaro Yasunaka
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Publication number: 20050201432Abstract: PROBLEM TO BE SOLVED: to realize a wide bandwidth light source capable of a stable operation providing a less spectrum variation. SOLUTION: Optical pulses 202 outputted by this optical pulse-generating device 201 are split by optical coupler 210. The one of split optical pulses is inputted in white light-emitting device 204 to emit the white light having the wide bandwidth. The other split is inputted in optical band pass filter 212 in operation-stabilizing circuit 207. Optical detector 213 detects a signal level of a specific wavelength and input in feedback circuit 215 to generate first and second feedback signals 205 and 206. Ring resonator fiber laser 208 uses any one of them and controls a rotation angle of the waveplate to realize stabilization of the output.Type: ApplicationFiled: March 9, 2005Publication date: September 15, 2005Inventors: Noboru Uehara, Yuichi Takushima, Kentaro Yasunaka