Patents by Inventor Kenya Kumamoto

Kenya Kumamoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070083767
    Abstract: An external data falsification detecting system includes a data acquirer section configured to acquire an external data at a time of system start and during system operation. A normal HASH value of the external data is previously stored in a storage unit. A comparator section calculates a HASH value of the acquired external data, compares the normal HASH value and the calculated HASH value, and determines that the external data was falsified such that a predetermined operation limitation is carried out, when the normal HASH value and the calculated HASH value are not coincident with each other.
    Type: Application
    Filed: August 30, 2006
    Publication date: April 12, 2007
    Applicant: NEC ELECTRONICS CORPORATION
    Inventor: Kenya Kumamoto
  • Patent number: 6900655
    Abstract: A plurality of integrated circuits are inspected for their characteristics, after applying uniform stresses to the integrated circuits from common interconnections. A circuit is formed from common interconnections which are connectable in common to like electrode pads of the integrated circuits on the circuit substrate. Uniform stresses are applied from the common interconnections to the integrated circuits while the electrode pads of the integrated circuits are being connected to the common interconnections corresponding thereto. The electrode pads are disconnected from the common interconnections after the uniform stresses have been applied to the integrated circuits. The integrated circuits which have been disconnected from the common interconnections are individually inspected to determine whether the integrated circuits are acceptable or not, using the electrode pads.
    Type: Grant
    Filed: December 24, 2002
    Date of Patent: May 31, 2005
    Assignee: NEC Electronics Corporation
    Inventor: Kenya Kumamoto
  • Publication number: 20030132489
    Abstract: A plurality of integrated circuits are inspected for their characteristics, after applying uniform stresses to the integrated circuits from common interconnections. Circuit forming means form common interconnections which are connectable in common to like electrode pads of the integrated circuits on the circuit substrate. By stress applying means, uniform stresses are applied from the common interconnections to the integrated circuits while the electrode pads of the integrated circuits are being connected to the common interconnections corresponding thereto. By interconnection disconnecting means, the electrode pads are disconnected from the common interconnections after the uniform stresses have been applied to the integrated circuits. By circuit inspecting means, the integrated circuits which have been disconnected from the common interconnections are individually inspected to determine whether the integrated circuits are acceptable or not, using the electrode pads.
    Type: Application
    Filed: December 24, 2002
    Publication date: July 17, 2003
    Applicant: NEC ELECTRONICS CORPORATION
    Inventor: Kenya Kumamoto