Abstract: Examples described herein relate to a network interface device. In some examples, the network interface device includes a network interface device that includes a network interface, a host interface, and multiple processors. In some examples, a first processor of the multiple processors is to execute a first control plane process and an embedded software update is to occur by: installation and execution of a second control plane process on the first processor and a third control plane process is to cause utilization of the second control plane process.

Abstract: Examples described herein relate to a network interface device comprising circuitry and data plane circuitry. In some examples, the circuitry is to receive control configurations from multiple control planes and based on a management configuration, selectively deny a control configuration of the received control configurations to configure operations of the data plane circuitry.

Abstract: Examples described herein relate to a packet processing device. In some examples, the packet processing device includes multiple processors and data plane circuitry. In some examples, a first processor of the multiple processors is to perform a first control plane, a second processor of the multiple processors is to perform a second control plane, and the first and second control planes are to communicate through an interface and wherein the first control plane is to discover capabilities of data plane circuitry and configure operation of the data plane circuitry by the interface.

Abstract: Examples described herein relate to a packet processing device that includes circuitry to perform packet processing operations according to a configuration and circuitry to execute control plane software to provide the configuration to the circuitry to perform packet processing operations according to the configuration. In some examples, the circuitry to perform packet processing operations according to the configuration is to continue operation independent of operation of the circuitry to execute control plane software.

Abstract: Examples described herein relate to a packet processing device comprising a programmable packet processing pipeline that is logically partitioned into multiple domains including privileged and unprivileged domains. The multiple domains can span one or more stages of the programmable packet processing pipeline, wherein at least one stage is to perform match action operations.

Abstract: A device and a method for performing bitwise manipulation is provided. Multiple bitwise logic circuits are coupled to an instruction decoder, a register array and a rotator. Each bitwise logic circuit includes input multiplexers connected to an output multiplexer. The instruction decoder receives a bit manipulation instruction and sends to each corresponding input multiplexer a control signal based on a type of the instruction. Each input multiplexer of each bitwise logic circuit receives a control signal, a constant signal that has a value that is indifferent to the value of the mask, and a mask affected signal that has a value that is responsive to a value of an associated mask bit. Each input multiplexer selects between the constant signal and the mask affected signal based on the control signal, and outputs a selected signal.

Abstract: A device and a method for performing bitwise manipulation is provided. Multiple bitwise logic circuits are coupled to an instruction decoder, a register array and a rotator. Each bitwise logic circuit includes input multiplexers connected to an output multiplexer. The instruction decoder is receives a bit manipulation instruction and sends to each corresponding input multiplexer a control signal based on a type of the instruction. Each input multiplexer of each bitwise logic circuit receives a control signal, a constant signal that has a value that is indifferent to the value of the mask, and a mask affected signal that has a value that is responsive to a value of an associated mask bit. Each input multiplexer selects between the constant signal and the mask affected signal based on the control signal, and outputs a selected signal.