Patents by Inventor Kerry Bernstein

Kerry Bernstein has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200144169
    Abstract: An assembly includes a chip including an integrated circuit, a casing including an integrated circuit and having an upper portion formed on a side of the chip and lower portion formed on another side of the chip, plural through-wafer vias (TWVs) for electrically connecting the integrated circuit of the chip and the integrated circuit of the casing, a system board configured to be electrically connected to the casing, and upper and lower cards connected to the casing for electrically connecting the casing to the system board.
    Type: Application
    Filed: December 16, 2019
    Publication date: May 7, 2020
    Inventors: Kerry Bernstein, Thomas Brunschwiler, Bruno Michel
  • Patent number: 10622294
    Abstract: An assembly includes a chip including an integrated circuit, a casing including an integrated circuit and including an upper portion formed on a side of the chip, a lower portion formed on another side of the chip, and a cooling inlet and a cooling outlet for transferring a coolant, provided in the casing, and for forming outer sidewalls of the upper portion and inner sidewalls of the lower portion, plural through-wafer vias for electrically connecting the integrated circuit of the chip and the integrated circuit of the casing, and a card connected to the casing for electrically connecting the casing to a system board. The card includes an upper card connected to the upper portion of the casing, and a lower card connected to the lower portion of the casing. Opposing edges of the upper card are located between vertical planes defined by the outer sidewalls of the upper portion of the casing.
    Type: Grant
    Filed: November 20, 2017
    Date of Patent: April 14, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Kerry Bernstein, Thomas Brunschwiler, Bruno Michel
  • Patent number: 10586760
    Abstract: An assembly includes a chip including an integrated circuit, a casing including an integrated circuit including plural active elements and including an upper portion formed on a side of the chip, a lower portion formed on another side of the chip, and a cooling inlet and a cooling outlet for transferring a coolant, provided in the casing, and for forming outer sidewalls of the upper portion and inner sidewalls of the lower portion, plural through-wafer vias for electrically connecting the integrated circuit of the chip and the integrated circuit of the casing, and a card connected to the casing for electrically connecting the casing to a system board. The outer sidewalls of the upper portion of the casing are located between vertical planes defined by opposing outer sidewalls of the lower portion of the casing.
    Type: Grant
    Filed: November 20, 2017
    Date of Patent: March 10, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Kerry Bernstein, Thomas Brunschwiler, Bruno Michel
  • Publication number: 20180090427
    Abstract: An assembly includes a chip including an integrated circuit, a casing including an integrated circuit including plural active elements and including an upper portion formed on a side of the chip, a lower portion formed on another side of the chip, and a cooling inlet and a cooling outlet for transferring a coolant, provided in the casing, and for forming outer sidewalls of the upper portion and inner sidewalls of the lower portion, plural through-wafer vias for electrically connecting the integrated circuit of the chip and the integrated circuit of the casing, and a card connected to the casing for electrically connecting the casing to a system board. The outer sidewalls of the upper portion of the casing are located between vertical planes defined by opposing outer sidewalls of the lower portion of the casing.
    Type: Application
    Filed: November 20, 2017
    Publication date: March 29, 2018
    Inventors: Kerry Bernstein, Thomas Brunschwiler, Bruno Michel
  • Publication number: 20180090428
    Abstract: An assembly includes a chip including an integrated circuit, a casing including an integrated circuit and including an upper portion formed on a side of the chip, a lower portion formed on another side of the chip, and a cooling inlet and a cooling outlet for transferring a coolant, provided in the casing, and for forming outer sidewalls of the upper portion and inner sidewalls of the lower portion, plural through-wafer vias for electrically connecting the integrated circuit of the chip and the integrated circuit of the casing, and a card connected to the casing for electrically connecting the casing to a system board. The card includes an upper card connected to the upper portion of the casing, and a lower card connected to the lower portion of the casing. Opposing edges of the upper card are located between vertical planes defined by the outer sidewalls of the upper portion of the casing.
    Type: Application
    Filed: November 20, 2017
    Publication date: March 29, 2018
    Inventors: Kerry Bernstein, Thomas Brunschwiler, Bruno Michel
  • Patent number: 9905505
    Abstract: An assembly includes a chip including an integrated circuit, a casing including an integrated circuit including plural active elements and including an upper portion formed on a side of the chip, a lower portion formed on another side of the chip, and a cooling inlet and a cooling outlet for transferring a coolant, provided in an upper surface of the casing, and forming outer sidewalls of the upper portion and inner sidewalls of the lower portion, plural through-wafer vias (TWVs) for electrically connecting the integrated circuit of the chip and the integrated circuit of the casing, and a card connected to the casing for electrically connecting the casing to a system board.
    Type: Grant
    Filed: October 27, 2015
    Date of Patent: February 27, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Kerry Bernstein, Thomas Brunschwiler, Bruno Michel
  • Patent number: 9905506
    Abstract: An assembly includes a chip including an integrated circuit, a casing including an integrated circuit and including an upper portion formed on a side of the chip, a lower portion formed on another side of the chip, and a cooling inlet and a cooling outlet for transferring a coolant, provided in an upper surface of the casing, and forming outer sidewalls of the upper portion and inner sidewalls of the lower portion, plural through-wafer vias (TWVs) for electrically connecting the integrated circuit of the chip and the integrated circuit of the casing, and a card connected to the casing for electrically connecting the casing to a system board. The card includes an upper card connected to the upper portion of the casing, and a lower card connected to the lower portion of the casing.
    Type: Grant
    Filed: October 27, 2015
    Date of Patent: February 27, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Kerry Bernstein, Thomas Brunschwiler, Bruno Michel
  • Patent number: 9496981
    Abstract: A system is provided for securing information residing on a circuit (e.g., processor). In particular, a system and method is provided for masking electromagnetic interference (EMI) emissions emitting from a circuit using a random noise generator in combination with a low noise amplifier and antenna. The random number generator matches a frequency of a circuit to be protected, and generates a random signal to be superimposed on data. The low noise amplifier receives the random signal from the random number generator, and an antenna receives the random signal from the low noise amplifier and transmits the random signal to mask the data of the circuit to be protected.
    Type: Grant
    Filed: July 22, 2009
    Date of Patent: November 15, 2016
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Kerry Bernstein, Sebastian T. Ventrone
  • Patent number: 9301424
    Abstract: A structure and method of using the structure. The structure including an integrated circuit chip having a set of micro-channels; an electro-rheological coolant fluid filling the micro-channels; first and second parallel channel electrodes on opposite sides of at least one micro-channel, the first channel electrode connected to an output of an auto-compensating temperature control circuit, the second channel electrode connected to ground; the auto-compensating temperature control circuit comprising a temperature stable current source connected between a positive voltage rail and the output and having a temperature sensitive circuit connected between ground and the output, a leakage current of the temperature stable current source being essentially insensitive to temperature and a leakage current of the temperature sensitive circuit increasing with temperature.
    Type: Grant
    Filed: October 14, 2015
    Date of Patent: March 29, 2016
    Assignee: International Business Machines Corporation
    Inventors: Kerry Bernstein, Kenneth J. Goodnow, Clarence R. Ogilvie, John Sargis, Jr., Sebastian T. Ventrone, Charles S. Woodruff
  • Publication number: 20160049353
    Abstract: An assembly includes a chip including an integrated circuit, a casing including an integrated circuit including plural active elements and including an upper portion formed on a side of the chip, a lower portion formed on another side of the chip, and a cooling inlet and a cooling outlet for transferring a coolant, provided in an upper surface of the casing, and forming outer sidewalls of the upper portion and inner sidewalls of the lower portion, plural through-wafer vias (TWVs) for electrically connecting the integrated circuit of the chip and the integrated circuit of the casing, and a card connected to the casing for electrically connecting the casing to a system board.
    Type: Application
    Filed: October 27, 2015
    Publication date: February 18, 2016
    Inventors: Kerry Bernstein, Thomas Brunschwiler, Bruno Michel
  • Publication number: 20160049360
    Abstract: An assembly includes a chip including an integrated circuit, a casing including an integrated circuit and including an upper portion formed on a side of the chip, a lower portion formed on another side of the chip, and a cooling inlet and a cooling outlet for transferring a coolant, provided in an upper surface of the casing, and forming outer sidewalls of the upper portion and inner sidewalls of the lower portion, plural through-wafer vias (TWVs) for electrically connecting the integrated circuit of the chip and the integrated circuit of the casing, and a card connected to the casing for electrically connecting the casing to a system board. The card includes an upper card connected to the upper portion of the casing, and a lower card connected to the lower portion of the casing.
    Type: Application
    Filed: October 27, 2015
    Publication date: February 18, 2016
    Inventors: KERRY BERNSTEIN, Thomas Brunschwiler, Bruno Michel
  • Patent number: 9264150
    Abstract: A reactive metal optical security device for implementation in an optical network and/or system to provide a mechanism for disrupting the optical network and/or system. The security device includes a mirror comprising a reactive metal stack and configured to reflect an optical signal and receive an electrical signal. The security device further includes a semiconductor chip configured to send the electrical signal to the mirror.
    Type: Grant
    Filed: March 28, 2012
    Date of Patent: February 16, 2016
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Kerry Bernstein, Kenneth J. Goodnow, Clarence R. Ogilvie, Charles S. Woodruff, Sebastian T. Ventrone
  • Patent number: 9257366
    Abstract: A structure and method of using the structure. The structure including an integrated circuit chip having a set of micro-channels; an electro-rheological coolant fluid filling the micro-channels; first and second parallel channel electrodes on opposite sides of at least one micro-channel, the first channel electrode connected to an output of an auto-compensating temperature control circuit, the second channel electrode connected to ground; the auto-compensating temperature control circuit comprising a temperature stable current source connected between a positive voltage rail and the output and having a temperature sensitive circuit connected between ground and the output, a leakage current of the temperature stable current source being essentially insensitive to temperature and a leakage current of the temperature sensitive circuit increasing with temperature.
    Type: Grant
    Filed: October 31, 2013
    Date of Patent: February 9, 2016
    Assignee: International Business Machines Corporation
    Inventors: Kerry Bernstein, Kenneth J. Goodnow, Clarence R. Ogilvie, John Sargis, Jr., Sebastian T. Ventrone, Charles S. Woodruff
  • Publication number: 20160037682
    Abstract: A structure and method of using the structure. The structure including an integrated circuit chip having a set of micro-channels; an electro-rheological coolant fluid filling the micro-channels; first and second parallel channel electrodes on opposite sides of at least one micro-channel, the first channel electrode connected to an output of an auto-compensating temperature control circuit, the second channel electrode connected to ground; the auto-compensating temperature control circuit comprising a temperature stable current source connected between a positive voltage rail and the output and having a temperature sensitive circuit connected between ground and the output, a leakage current of the temperature stable current source being essentially insensitive to temperature and a leakage current of the temperature sensitive circuit increasing with temperature.
    Type: Application
    Filed: October 14, 2015
    Publication date: February 4, 2016
    Inventors: Kerry Bernstein, Kenneth J. Goodnow, Clarence R. Ogilvie, John Sargis, JR., Sebastian T. Ventrone, Charles S. Woodruff
  • Patent number: 9252072
    Abstract: An assembly includes a chip including an integrated circuit, a casing including an integrated circuit including plural active elements and having an upper portion formed on a side of the chip and lower portion formed on another side of the chip, plural through-wafer vias (TWVs) for electrically connecting the integrated circuit of the chip and the integrated circuit of the casing, and a card connected to the casing for electrically connecting the casing to a system board.
    Type: Grant
    Filed: December 4, 2013
    Date of Patent: February 2, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Kerry Bernstein, Thomas Brunschwiler, Bruno Michel
  • Patent number: 9252071
    Abstract: An assembly includes a chip including an integrated circuit, a casing including an integrated circuit and having an upper portion formed on a side of the chip and lower portion formed on another side of the chip, plural through-wafer vias (TWVs) for electrically connecting the integrated circuit of the chip and the integrated circuit of the casing, and a card connected to the casing for electrically connecting the casing to a system board. The card includes an upper card connected to the upper portion of the casing, and a lower card connected to the lower portion of the casing. The upper card includes one of a photosensor, light emitting element, radio frequency (RF) antenna, and radio frequency emitter. The lower card includes an area array input/output.
    Type: Grant
    Filed: December 4, 2013
    Date of Patent: February 2, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Kerry Bernstein, Thomas Brunschwiler, Bruno Michel
  • Patent number: 9082875
    Abstract: A method of normalizing strain in semiconductor devices and normalized strain semiconductor devices. The method includes: forming first and second field effect transistors of an integrated circuit; forming a stress layer over the first and second field effect transistors, the stress layer inducing strain in channel regions of the first and second field effect transistors; and selectively thinning the stress layer over at least a portion of the second field effect transistor.
    Type: Grant
    Filed: October 9, 2012
    Date of Patent: July 14, 2015
    Assignee: International Business Machines Corporation
    Inventors: Bruce Balch, Kerry Bernstein, John Joseph Ellis-Monaghan, Nazmul Habib
  • Patent number: 9075106
    Abstract: An emission map of a circuit to be tested for alterations is obtained by measuring the physical circuit to be tested. An emission map of a reference circuit is obtained by measuring a physical reference circuit or by simulating the emissions expected from the reference circuit. The emission map of the circuit to be tested is compared with the emission map of the reference circuit, to determine presence of alterations in the circuit to be tested, as compared to the reference circuit.
    Type: Grant
    Filed: July 30, 2009
    Date of Patent: July 7, 2015
    Assignee: International Business Machines Corporation
    Inventors: Kerry Bernstein, James Culp, David F. Heidel, Dirk Pfeiffer, Anthony D. Polson, Peilin Song, Franco Stellari, Robert L. Wisnieff
  • Patent number: 9052724
    Abstract: An integrated circuit chip having micro-channels formed in multiple regions of the integrated circuit chip and a method of cooling the integrated circuit chip. The method includes for any region of the multiple regions, allowing a coolant to flow through micro-channels of the region only when a temperature of the region exceed a first specified temperature and blocking the coolant from flowing through the micro-channels of the region when a temperature of the region is below a second specified temperature.
    Type: Grant
    Filed: August 7, 2012
    Date of Patent: June 9, 2015
    Assignee: International Business Machines Corporation
    Inventors: Kerry Bernstein, Kenneth J. Goodnow, Clarence R. Ogilvie
  • Publication number: 20150116939
    Abstract: A structure and method of using the structure. The structure including an integrated circuit chip having a set of micro-channels; an electro-rheological coolant fluid filling the micro-channels; first and second parallel channel electrodes on opposite sides of at least one micro-channel, the first channel electrode connected to an output of an auto-compensating temperature control circuit, the second channel electrode connected to ground; the auto-compensating temperature control circuit comprising a temperature stable current source connected between a positive voltage rail and the output and having a temperature sensitive circuit connected between ground and the output, a leakage current of the temperature stable current source being essentially insensitive to temperature and a leakage current of the temperature sensitive circuit increasing with temperature.
    Type: Application
    Filed: October 31, 2013
    Publication date: April 30, 2015
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Kerry Bernstein, Kenneth J. Goodnow, Clarence R. Ogilvie, John Sargis, Jr., Sebastian T. Ventrone, Charles S. Woodruff