Patents by Inventor Kerry Nagel
Kerry Nagel has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12022738Abstract: Fabrication of a magnetic memory element, including a via (125) in an interlevel dielectric layer (120), providing an electrical connection between an underlying metal region (110) and a magnetoresistive stack device, such as a magnetic tunnel junction (150), involves forming a transition metal layer (130) in the via by atomic layer deposition. The via optionally includes a tantalum-rich layer (140) above, and/or a cap layer (115) below, the transition metal layer, and may have a diameter less than or equal than a diameter of the magnetoresistive stack device.Type: GrantFiled: August 22, 2019Date of Patent: June 25, 2024Assignee: EVERSPIN TECHNOLOGIES, INC.Inventors: Sanjeev Aggarwal, Sarin Deshpande, Kerry Nagel, Santosh Karre
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Patent number: 11925122Abstract: A magnetoresistive structure having two dielectric layers, and method of manufacturing same, includes a free magnetic layer positioned between the two dielectric layers. The method of manufacture comprises at least two etch processes and at least one encapsulation process interposed therebetween wherein the encapsulation is formed on sidewalls of the partially formed magnetoresistive stack between etch processes. For example, an exemplary method of manufacturing a magnetoresistive device includes etching through a second electrode, second dielectric layer and free magnetic layer to provide a sidewall of (i) an unpinned synthetic antiferromagnetic structure, (ii) a second dielectric layer and (iii) a free magnetic layer; thereafter, forming an encapsulation material on the sidewall of the unpinned synthetic antiferromagnetic structure, second dielectric layer and free magnetic layer, and after forming the encapsulation material, etching through a first dielectric layer.Type: GrantFiled: September 8, 2021Date of Patent: March 5, 2024Assignee: EVERSPIN TECHNOLOGIES, INC.Inventors: Sanjeev Aggarwal, Kerry Nagel, Jason Janesky
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Publication number: 20220336734Abstract: A method of manufacturing an integrated circuit device comprises forming a layer of barrier material on a surface, where the surface includes interlayer dielectric and a feature of a metal layer. The method may also include forming a layer of contact material above the layer of barrier material. The method may further include removing a portion of the layer of barrier material and a portion of the layer of contact material to form a via. Additionally, the method may include depositing magnetoresistive stack above, and in contact with, the via, where a width of the magnetoresistive stack is greater than or equal to a width of the via.Type: ApplicationFiled: April 14, 2022Publication date: October 20, 2022Applicant: Everspin Technologies, Inc.Inventors: Sanjeev AGGARWAL, Kerry NAGEL, Santosh KARRE
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Patent number: 11264564Abstract: A magnetoresistive device may include one or more electrodes or electrically conductive lines and a fixed region and a free region disposed between the electrodes or electrically conductive lines. The fixed region may have a fixed magnetic state and the free region may be configured to have a first magnetic state and a second magnetic state. The free region may store a first value when in the first magnetic state and store a second value when in the second magnetic state. The magnetoresistive device may further include a dielectric layer between the free region and the fixed region and a spin-Hall (SH) material proximate to at least a portion of the free region. An insertion layer may be disposed between the SH material and the free region.Type: GrantFiled: February 6, 2020Date of Patent: March 1, 2022Assignee: Everspin Technologies, Inc.Inventors: Sumio Ikegawa, Hamid Almasi, Shimon, Kerry Nagel, Han Kyu Lee
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Publication number: 20210408371Abstract: A magnetoresistive structure having two dielectric layers, and method of manufacturing same, includes a free magnetic layer positioned between the two dielectric layers. The method of manufacture comprises at least two etch processes and at least one encapsulation process interposed therebetween wherein the encapsulation is formed on sidewalls of the partially formed magnetoresistive stack between etch processes. For example, an exemplary method of manufacturing a magnetoresistive device includes etching through a second electrode, second dielectric layer and free magnetic layer to provide a sidewall of (i) an unpinned synthetic antiferromagnetic structure, (ii) a second dielectric layer and (iii) a free magnetic layer; thereafter, forming an encapsulation material on the sidewall of the unpinned synthetic antiferromagnetic structure, second dielectric layer and free magnetic layer, and after forming the encapsulation material, etching through a first dielectric layer.Type: ApplicationFiled: September 8, 2021Publication date: December 30, 2021Applicant: Everspin Technologies, Inc.Inventors: Sanjeev AGGARWAL, Kerry NAGEL, Jason JANESKY
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Publication number: 20210328138Abstract: Fabrication of a magnetic memory element, including a via (125) in an interlevel dielectric layer (120), providing an electrical connection between an underlying metal region (110) and a magnetoresistive stack device, such as a magnetic tunnel junction (150), involves forming a transition metal layer (130) in the via by atomic layer deposition. The via optionally includes a tantalum-rich layer (140) above, and/or a cap layer (115) below, the transition metal layer, and may have a diameter less than or equal than a diameter of the magnetoresistive stack device.Type: ApplicationFiled: August 22, 2019Publication date: October 21, 2021Applicant: Everspin Technologies, Inc.Inventors: Sanjeev AGGARWAL, Sarin DESHPANDE, Kerry NAGEL, Santosh KARRE
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Patent number: 11139429Abstract: A magnetoresistive structure having two dielectric layers, and method of manufacturing same, includes a free magnetic layer positioned between the two dielectric layers. The method of manufacture comprises at least two etch processes and at least one encapsulation process interposed therebetween wherein the encapsulation is formed on sidewalls of the partially formed magnetoresistive stack between etch processes. For example, an exemplary method of manufacturing a magnetoresistive device includes etching through a second electrode, second dielectric layer and free magnetic layer to provide a sidewall of (i) an unpinned synthetic antiferromagnetic structure, (ii) a second dielectric layer and (iii) a free magnetic layer; thereafter, forming an encapsulation material on the sidewall of the unpinned synthetic antiferromagnetic structure, second dielectric layer and free magnetic layer, and after forming the encapsulation material, etching through a first dielectric layer.Type: GrantFiled: February 19, 2020Date of Patent: October 5, 2021Assignee: Everspin Technologies, Inc.Inventors: Sanjeev Aggarwal, Kerry Nagel, Jason Janesky
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Publication number: 20210249589Abstract: A magnetoresistive device may include one or more electrodes or electrically conductive lines and a fixed region and a free region disposed between the electrodes or electrically conductive lines. The fixed region may have a fixed magnetic state and the free region may be configured to have a first magnetic state and a second magnetic state. The free region may store a first value when in the first magnetic state and store a second value when in the second magnetic state. The magnetoresistive device may further include a dielectric layer between the free region and the fixed region and a spin-Hall (SH) material proximate to at least a portion of the free region. An insertion layer may be disposed between the SH material and the free region.Type: ApplicationFiled: February 6, 2020Publication date: August 12, 2021Applicant: Everspin Technologies, Inc.Inventors: Sumio IKEGAWA, Hamid ALMASI, SHIMON, Kerry NAGEL, Han Kyu LEE
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Patent number: 11005031Abstract: A magnetoresistive device may include a first plurality of magnetic tunnel junction (MTJ) bits arranged in a first XY plane, and a second plurality of MTJ bits arranged in a second XY plane that is spaced apart from the first XY plane in a Z direction. And, the MTJ bits of the first plurality of MTJ bits may be spaced apart from the MTJ bits of the second plurality of MTJ bits in the X and Y directions.Type: GrantFiled: September 5, 2019Date of Patent: May 11, 2021Assignee: Everspin Technologies, Inc.Inventors: Kerry Nagel, Sanjeev Aggarwal
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Publication number: 20200185602Abstract: A magnetoresistive structure having two dielectric layers, and method of manufacturing same, includes a free magnetic layer positioned between the two dielectric layers. The method of manufacture comprises at least two etch processes and at least one encapsulation process interposed therebetween wherein the encapsulation is formed on sidewalls of the partially formed magnetoresistive stack between etch processes. For example, an exemplary method of manufacturing a magnetoresistive device includes etching through a second electrode, second dielectric layer and free magnetic layer to provide a sidewall of (i) an unpinned synthetic antiferromagnetic structure, (ii) a second dielectric layer and (iii) a free magnetic layer; thereafter, forming an encapsulation material on the sidewall of the unpinned synthetic antiferromagnetic structure, second dielectric layer and free magnetic layer, and after forming the encapsulation material, etching through a first dielectric layer.Type: ApplicationFiled: February 19, 2020Publication date: June 11, 2020Applicant: Everspin Technologies, Inc.Inventors: Sanjeev AGGARWAL, Kerry NAGEL, Jason Janesky
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Patent number: 10608172Abstract: A magnetoresistive structure having two dielectric layers, and method of manufacturing same, includes a free magnetic layer positioned between the two dielectric layers. The method of manufacture comprises at least two etch processes and at least one encapsulation process interposed therebetween wherein the encapsulation is formed on sidewalls of the partially formed magnetoresistive stack between etch processes. For example, an exemplary method of manufacturing a magnetoresistive device includes etching through a second electrode, second dielectric layer and free magnetic layer to provide a sidewall of (i) an unpinned synthetic antiferromagnetic structure, (ii) a second dielectric layer and (iii) a free magnetic layer; thereafter, forming an encapsulation material on the sidewall of the unpinned synthetic antiferromagnetic structure, second dielectric layer and free magnetic layer, and after forming the encapsulation material, etching through a first dielectric layer.Type: GrantFiled: January 24, 2019Date of Patent: March 31, 2020Assignee: Everspin Technologies, Inc.Inventors: Sanjeev Aggarwal, Kerry Nagel, Jason Janesky
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Publication number: 20200075843Abstract: A magnetoresistive device may include a first plurality of magnetic tunnel junction (MTJ) bits arranged in a first XY plane, and a second plurality of MTJ bits arranged in a second XY plane that is spaced apart from the first XY plane in a Z direction. And, the MTJ bits of the first plurality of MTJ bits may be spaced apart from the MTJ bits of the second plurality of MTJ bits in the X and Y directions.Type: ApplicationFiled: September 5, 2019Publication date: March 5, 2020Applicant: Everspin Technologies, Inc.Inventors: Kerry NAGEL, Sanjeev AGGARWAL
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Publication number: 20190157550Abstract: A magnetoresistive structure having two dielectric layers, and method of manufacturing same, includes a free magnetic layer positioned between the two dielectric layers. The method of manufacture comprises at least two etch processes and at least one encapsulation process interposed therebetween wherein the encapsulation is formed on sidewalls of the partially formed magnetoresistive stack between etch processes. For example, an exemplary method of manufacturing a magnetoresistive device includes etching through a second electrode, second dielectric layer and free magnetic layer to provide a sidewall of (i) an unpinned synthetic antiferromagnetic structure, (ii) a second dielectric layer and (iii) a free magnetic layer; thereafter, forming an encapsulation material on the sidewall of the unpinned synthetic antiferromagnetic structure, second dielectric layer and free magnetic layer, and after forming the encapsulation material, etching through a first dielectric layer.Type: ApplicationFiled: January 24, 2019Publication date: May 23, 2019Applicant: Everspin Technologies, Inc.Inventors: Sanjeev AGGARWAL, Kerry NAGEL, Jason Janesky
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Patent number: 10230046Abstract: A magnetoresistive structure having two dielectric layers, and method of manufacturing same, includes a free magnetic layer positioned between the two dielectric layers. The method of manufacture comprises at least two etch processes and at least one encapsulation process interposed therebetween wherein the encapsulation is formed on sidewalls of the partially formed magnetoresistive stack between etch processes. For example, an exemplary method of manufacturing a magnetoresistive device includes etching through a second electrode, second dielectric layer and free magnetic layer to provide a sidewall of (i) an unpinned synthetic antiferromagnetic structure, (ii) a second dielectric layer and (iii) a free magnetic layer; thereafter, forming an encapsulation material on the sidewall of the unpinned synthetic antiferromagnetic structure, second dielectric layer and free magnetic layer, and after forming the encapsulation material, etching through a first dielectric layer.Type: GrantFiled: December 28, 2017Date of Patent: March 12, 2019Assignee: Everspin Technologies, Inc.Inventors: Sanjeev Aggarwal, Kerry Nagel, Jason Janesky
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Publication number: 20180123032Abstract: A magnetoresistive structure having two dielectric layers, and method of manufacturing same, includes a free magnetic layer positioned between the two dielectric layers. The method of manufacture comprises at least two etch processes and at least one encapsulation process interposed therebetween wherein the encapsulation is formed on sidewalls of the partially formed magnetoresistive stack between etch processes. For example, an exemplary method of manufacturing a magnetoresistive device includes etching through a second electrode, second dielectric layer and free magnetic layer to provide a sidewall of (i) an unpinned synthetic antiferromagnetic structure, (ii) a second dielectric layer and (iii) a free magnetic layer; thereafter, forming an encapsulation material on the sidewall of the unpinned synthetic antiferromagnetic structure, second dielectric layer and free magnetic layer, and after forming the encapsulation material, etching through a first dielectric layer.Type: ApplicationFiled: December 28, 2017Publication date: May 3, 2018Inventors: Sanjeev Aggarwal, Kerry Nagel, Jason Janesky
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Patent number: 9893275Abstract: A magnetoresistive structure having two dielectric layers, and method of manufacturing same, includes a free magnetic layer positioned between the two dielectric layers. The method of manufacture comprises at least two etch processes and at least one encapsulation process interposed therebetween wherein the encapsulation is formed on sidewalls of the partially formed magnetoresistive stack between etch processes.Type: GrantFiled: January 2, 2017Date of Patent: February 13, 2018Assignee: Everspin Technologies, Inc.Inventors: Sanjeev Aggarwal, Kerry Nagel, Jason Janesky
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Publication number: 20170148980Abstract: A magnetoresistive structure having two dielectric layers, and method of manufacturing same, includes a free magnetic layer positioned between the two dielectric layers. The method of manufacture comprises at least two etch processes and at least one encapsulation process interposed therebetween wherein the encapsulation is formed on sidewalls of the partially formed magnetoresistive stack between etch processes.Type: ApplicationFiled: January 2, 2017Publication date: May 25, 2017Inventors: Sanjeev Aggarwal, Kerry Nagel, Jason Janesky
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Patent number: 9548442Abstract: A magnetoresistive structure having two dielectric layers, and method of manufacturing same, includes a free magnetic layer positioned between the two dielectric layers. The method of manufacture comprises at least two etch processes and at least an encapsulation process interposed therebetween wherein the encapsulation is formed on sidewalls of the partially formed magnetoresistive stack between etch processes.Type: GrantFiled: July 12, 2015Date of Patent: January 17, 2017Assignee: Everspin Technologies, Inc.Inventors: Sanjeev Aggarwal, Kerry Nagel, Jason Janesky
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Publication number: 20150318465Abstract: A magnetoresistive structure having two dielectric layers, and method of manufacturing same, includes a free magnetic layer positioned between the two dielectric layers. The method of manufacture comprises at least two etch processes and at least an encapsulation process interposed therebetween wherein the encapsulation is formed on sidewalls of the partially formed magnetoresistive stack between etch processes.Type: ApplicationFiled: July 12, 2015Publication date: November 5, 2015Inventors: Sanjeev Aggarwal, Kerry Nagel, Jason Janesky
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Patent number: 9093640Abstract: A dual tunnel barrier magnetic element has a free magnetic layer positioned between first and second tunnel barriers and an electrode over the second tunnel barrier. A two step etch process allows for forming an encapsulation material on a side wall of the electrode and the second tunnel barrier subsequent to the first etch for preventing damage to the first tunnel barrier when performing the second etch to remove a portion of the free layer.Type: GrantFiled: March 19, 2014Date of Patent: July 28, 2015Assignee: Everspin Technologies, Inc.Inventors: Sanjeev Aggarwal, Kerry Nagel, Jason Janesky