Abstract: A memory management unit of use in a memory management system. The memory management unit selectively maps a logical address to a respective physical address in accordance with a selected one of a plurality of segment descriptors, each of which defines a logical-to-physical address mapping and a range of address spaces for which such mapping is valid. The mapping is achieved using an improved associative memory circuit. Means are provided to detect mapping conflicts between new segment descriptors and segment descriptors already stored, and to prevent the storage of such conflicting segment descriptors. A method and circuit are provided to coordinate the parallel operation of a plurality of the memory management units or the like.