Abstract: Systems and methods according to one or more embodiments are provided for correcting a current measurement through a speaker in an audio system. In one example, a system for driving a speaker includes an output stage configured to drive a current through the speaker. The system further includes a first and second current sensor coupled to the output stage and configured to measure a positive current including a first measurement error and a negative current including a second measurement error through the speaker, respectively. The system further includes a processing block coupled to the first and second current sensors to receive the measured positive and negative current signals and configured to add a positive offset value to an input of each first and second current sensors, determine the first and second measurement errors, and correct a measured current using the positive and negative currents and the determined first and second measurement errors.

Abstract: Systems and methods according to one or more embodiments are provided for correcting a current measurement through a speaker in an audio system. In one example, a system for driving a speaker includes an output stage configured to drive a current through the speaker. The system further includes a first and second current sensor coupled to the output stage and configured to measure a positive current including a first measurement error and a negative current including a second measurement error through the speaker, respectively. The system further includes a processing block coupled to the first and second current sensors to receive the measured positive and negative current signals and configured to add a positive offset value to an input of each first and second current sensors, determine the first and second measurement errors, and correct a measured current using the positive and negative currents and the determined first and second measurement errors.

Abstract: A level shifter comprising a first driver transistor for receiving an input signal. A gate-controlled transistor coupled to the first driver transistor. A second driver transistor coupled to the gate controlled transistor. An output coupled to the second driver transistor, wherein the gate-controlled transistor is for receiving a predetermined gate voltage when the output voltage exceeds a predetermined value.

Abstract: Embodiments of the present invention provide an approach for protecting electronic devices against the use of unqualified and/or unauthorized (e.g., “grey market”) hardware components. Specifically, in a typical embodiment, a hardware component that a user is attempting to use with an electronic device will be detected. Then, the device information associated with the hardware component (e.g., serial number, vital product data (VPD), etc.) will be identified from the hardware component (e.g., as stored therein).

Abstract: A method, computer program product, and computer system for monitoring for electrostatic discharge (ESD) events. An ESD monitor for potential of electrostatic discharge events in a sensed area through a plurality of ESD sensors coupled to the ESD monitor. The monitor senses for a charge level which could cause ESD event and entry of an operator into a sensed area. If an ESD event is detected, issue an ESD event alert to the operator and recording data to a tangible storage device; determine environmental factors at time and date of the ESD event; compare the ESD event and associated environmental factors to other ESD events with associated environmental factors; and determine if a correlation exists between the ESD event and associated environmental factors and the other ESD events with associated environmental factors.

Abstract: A level shifter comprising a first driver transistor for receiving an input signal. A gate-controlled transistor coupled to the first driver transistor. A second driver transistor coupled to the gate controlled transistor. An output coupled to the second driver transistor, wherein the gate-controlled transistor is for receiving a predetermined gate voltage when the output voltage exceeds a predetermined value.

Abstract: A method for determining a margin requirement associated with a plurality of financial instruments within a portfolio is disclosed. The method includes receiving a plurality of data associated with the plurality of financial instruments within the portfolio, calculating a maximum risk margin for each of the plurality of risk factors such that the maximum risk margin for each of the plurality of risk factors is determined based on the plurality of data, and calculating a total multi-factor risk margin based on maximum risk margin for each of the plurality of risk factors.

Abstract: A system and method for determining a margin requirement associated with a plurality of financial instruments within a portfolio is disclosed.

Abstract: A level shifter comprising a first driver transistor receiving an input signal. A gate-controlled transistor coupled to the first driver transistor. A second driver transistor coupled to the gate controlled transistor. An output coupled to the second driver transistor, wherein the gate-controlled transistor is for receiving a predetermined gate voltage when the output voltage exceeds a predetermined value.

Abstract: A system and method for determining a margin requirement associated with a plurality of financial instruments within a portfolio is disclosed.

Abstract: A system and method for determining a margin requirement associated with a plurality of financial instruments within a portfolio is disclosed.

Abstract: An apparatus for detecting and controlling current. A current detector for generating a first value that represents an amount of current being delivered to a device. A current limit circuit for generating a second value that represents a maximum permitted current level from a current source. A current controller for controlling the amount of current drawn by the device if the first value exceeds the second value.

Abstract: A level shifter comprising a first driver transistor receiving an input signal. A gate-controlled transistor coupled to the first driver transistor. A second driver transistor coupled to the gate controlled transistor. An output coupled to the second driver transistor, wherein the gate-controlled transistor is for receiving a predetermined gate voltage when the output voltage exceeds a predetermined value.

Abstract: Embodiments of the present invention provide an approach for protecting electronic devices against the use of unqualified and/or unauthorized (e.g., “grey market”) hardware components. Specifically, in a typical embodiment, a hardware component that a user is attempting to use with an electronic device will be detected. Then, the device information associated with the hardware component (e.g., serial number, vital product data (VPD), etc.) will be identified from the hardware component (e.g., as stored therein).

Abstract: A battery assisted level shifter comprises a pull up transistor pulling up an output when a received input signal is high, a pull down transistor pulling down the output when the received input signal is low, and a battery element to provide voltage offsets. The battery element can be implemented using one or more pull-up transistors for assisting with pulling up the output. The level shifter can be used in class-D amplifiers, DC-DC power converters and interfaces between circuits having different reference voltages.

Abstract: A method for determining a margin requirement associated with a plurality of financial instruments within a portfolio is disclosed. The method includes receiving a plurality of data associated with the plurality of financial instruments within the portfolio, calculating a maximum risk margin for each of the plurality of risk factors such that the maximum risk margin for each of the plurality of risk factors is determined based on the plurality of data, and calculating a total multi-factor risk margin based on maximum risk margin for each of the plurality of risk factors.

Abstract: A method, computer program product, and computer system for monitoring for electrostatic discharge (ESD) events. An ESD monitor for potential of electrostatic discharge events in a sensed area through a plurality of ESD sensors coupled to the ESD monitor. The monitor senses for a charge level which could cause ESD event and entry of an operator into a sensed area. If an ESD event is detected, issue an ESD event alert to the operator and recording data to a tangible storage device; determine environmental factors at time and date of the ESD event; compare the ESD event and associated environmental factors to other ESD events with associated environmental factors; and determine if a correlation exists between the ESD event and associated environmental factors and the other ESD events with associated environmental factors.

Abstract: An apparatus for detecting and controlling current. A current detector for generating a first value that represents an amount of current being delivered to a device. A current limit circuit for generating a second value that represents a maximum permitted current level from a current source. A current controller for controlling the amount of current drawn by the device if the first value exceeds the second value.

Abstract: A computer specifies a substrate comprising a first side opposite a second side. The computer specifies a first plurality of flexible pins protruding from the first side of the substrate, the first plurality of pins for installing in a first plurality of pad connectors of a pinless socket. The computer specifies a second plurality of flexible pins protruding from the second side of the substrate, the second plurality of pins for installing in a second plurality of pad connectors of a pinless integrated circuit component, wherein the first selection of flexible pins are for electrical connection to the second plurality of flexible pins through the substrate to provide electrical contact points between the pinless socket and the pinless integrated circuit component.