Abstract: A semiconductor memory device includes a substrate including a cell area and a peripheral area defined by a periphery of the cell area, the cell area including a dummy cell area and a normal cell area, and an active area defined by a cell element isolation film. The device includes a cell area separation film defining the cell area in the substrate, the dummy cell area defining a boundary with the cell area separation film between the normal cell area and the cell area separation film. The device includes a normal bit-line on the normal cell area and extending in a first direction, a dummy bit-line group on the dummy cell area, the dummy bit-line group including a plurality of dummy bit-lines extending in the first direction, and a plurality of storage contacts connected to the active area and located along a second direction perpendicular to the first direction.

Abstract: A method of fabricating a semiconductor device includes forming a mask pattern on an active region of a substrate defined by an isolation region. The mask pattern includes an opening therein exposing a portion of the active region. The exposed portion of the active region is etched to define a preliminary gate trench therein including opposing sidewalls and a surface therebetween, where portions of the mask pattern extend to edges of the active region outside the preliminary gate trench. An annealing process is performed on the substrate to form a gate trench from the preliminary gate trench, and gate electrode is formed in the gate trench. The preliminary gate trench and the gate trench have a substantially similar width defined between the edges of the active region including the portions of the mask pattern thereon.

Abstract: A method of fabricating a semiconductor device includes forming a mask pattern on an active region of a substrate defined by an isolation region. The mask pattern includes an opening therein exposing a portion of the active region. The exposed portion of the active region is etched to define a preliminary gate trench therein including opposing sidewalls and a surface therebetween, where portions of the mask pattern extend to edges of the active region outside the preliminary gate trench. An annealing process is performed on the substrate to form a gate trench from the preliminary gate trench, and gate electrode is formed in the gate trench. The preliminary gate trench and the gate trench have a substantially similar width defined between the edges of the active region including the portions of the mask pattern thereon.

Abstract: In a method of forming a silicon oxide layer, a spin-on-glass (SOG) layer may be formed on an object including a recess using an SOG composition. The SOG layer may be pre-baked and then cured by contacting with at least one material selected from the group consisting of water, a basic material and an oxidant, under a pressure of from about 1.5 atm to about 100 atm. The cured SOG layer may be baked.

Abstract: Example embodiments relate to a method of manufacturing a capacitor and a method of manufacturing a semiconductor device using the same. Other example embodiments relate to a method of manufacturing a capacitor having improved characteristics and a method of manufacturing a semiconductor device using the same. In a method of manufacturing a capacitor having improved characteristics, an insulation layer, including a pad therein, may be formed on a substrate. An etch stop layer may be formed on the insulation layer. A mold layer may be formed on the etch stop layer. The mold layer may be partially etched by a first etching process to form a first contact hole exposing the etch stop layer. The mold layer may be partially etched by a second etching process to form a second contact hole. The exposed etch stop layer may be etched by a third etching process to form a third contact hole exposing the pad.

Abstract: The present invention provides methods of cleaning a semiconductor device by removing contaminants, such as particles and/or etching by-products, from a structure of a semiconductor device using a first cleaning solution including a mixture of ammonium hydroxide (NH4OH), hydrogen peroxide (H2O2) and deionized (DI) water, and a second cleaning solution including ozone (O3) water. The present invention also provides methods of manufacturing a semiconductor device using these methods of cleaning the semiconductor device.

Abstract: The present invention provides methods of cleaning a semiconductor device by removing contaminants, such as particles and/or etching by-products, from a structure of a semiconductor device using a first cleaning solution including a mixture of ammonium hydroxide (NH4OH), hydrogen peroxide (H2O2) and deionized (DI) water, and a second cleaning solution including ozone (O3) water. The present invention also provides methods of manufacturing a semiconductor device using these methods of cleaning the semiconductor device.

Abstract: In a method of removing a photoresist pattern, a photoresist pattern may be formed on an object layer. Impurities may be implanted into the object layer by a first ion implantation process employing the first photoresist pattern as a first ion implantation mask. The photoresist pattern hardened by the first ion implantation process may be transformed into a first water-soluble photoresist pattern. The water-soluble photoresist pattern may be removed from the object layer.

Abstract: Example embodiments relate to a method of forming a conductive structure. Other example embodiments relate to a method of forming a conductive structure capable of storing or transmitting electric charges. In example embodiments, when a conductive structure including first and second conductive patterns extending in a first horizontal direction is formed, at least one of the first and second conductive patterns may decreases in size. When the conductive structure is vertically bisected in a second horizontal direction perpendicular to the first horizontal direction to form conductive members, a coupling effect generated between the conductive members adjacent to each other may be reduced.

Abstract: Example embodiments relate to a method of manufacturing a capacitor and a method of manufacturing a semiconductor device using the same. Other example embodiments relate to a method of manufacturing a capacitor having improved characteristics and a method of manufacturing a semiconductor device using the same. In a method of manufacturing a capacitor having improved characteristics, an insulation layer, including a pad therein, may be formed on a substrate. An etch stop layer may be formed on the insulation layer. A mold layer may be formed on the etch stop layer. The mold layer may be partially etched by a first etching process to form a first contact hole exposing the etch stop layer. The mold layer may be partially etched by a second etching process to form a second contact hole. The exposed etch stop layer may be etched by a third etching process to form a third contact hole exposing the pad.

Abstract: Example embodiments of the present invention relate to a method of cleaning a semiconductor device and a method of manufacturing a semiconductor device using the same. Other example embodiments of the present invention relate to a method of cleaning a semiconductor device by removing a residual organic compound and a method of manufacturing a semiconductor device using the same. An oxide layer including an opening may be formed on a substrate. A conductive layer may be formed in the opening. The oxide layer may be removed using an etching solution including an organic compound. A residual organic compound adhered to the substrate and the conductive layer may be removed using an ozone solution. The residual organic compound and an etching residue may be removed by the cleaning process using the ozone solution.

Abstract: A corrosion-inhibiting cleaning composition for semiconductor wafer processing includes hydrogen peroxide at a concentration in a range from about 0.5 wt % to about 5 wt %, sulfuric acid at a concentration in a range from about 1 wt % to about 10 wt %, hydrogen fluoride at a concentration in a range from about 0.01 wt % to about 1 wt %; an azole at a concentration in a range from about 0.1 wt % to about 5 wt % and deionized water. The azole operates to inhibit corrosion of a metal layer being cleaned by chelating with a surface of the metal layer during a cleaning process.

Abstract: In a method of removing a photoresist pattern from a substrate without deteriorating a lower electrode or increasing processing time, ozone gas may be provided onto a substrate on which a photoresist pattern may be formed. An oxidation-decomposition process may be carried out using the ozone gas, to thereby decompose the photoresist pattern on the substrate. The decomposed photoresist pattern may be dissolved into water and removed from the substrate in a rinsing process. Accordingly, a photoresist pattern in an opening having a relatively high aspect ratio may be sufficiently removed from a substrate without deteriorating the lower electrode or increasing processing time.

Abstract: A corrosion-inhibiting cleaning composition for semiconductor wafer processing includes hydrogen peroxide at a concentration in a range from about 0.5 wt % to about 5 wt %, sulfuric acid at a concentration in a range from about 1 wt % to about 10 wt %, hydrogen fluoride at a concentration in a range from about 0.01 wt % to about 1 wt %; an azole at a concentration in a range from about 0.1 wt % to about 5 wt % and deionized water. The azole operates to inhibit corrosion of a metal layer being cleaned by chelating with a surface of the metal layer during a cleaning process.

Abstract: An apparatus for drying a wafer includes a rotating chuck configured to rotate the wafer. A movable de-ionized water supply member and an organic solvent supply member are positioned adjacent a face of the wafer. The de-ionized water supply member supplies de-ionized water onto the wafer, and the organic solvent supply member has a plurality of solvent supply nozzles disposed to supply an organic solvent onto the wafer. The organic solvent supply member includes a first solvent supply member and a second solvent supply member. The de-ionized water supply member and the first solvent supply member move radially between a position adjacent the central portion of the wafer and the edge portion of the wafer.

Abstract: A method of cleaning damaged layers and polymer residue on semiconductor devices includes mixing HF and ozone water in a vessel to form a solution of HF and ozone water, and dipping a semiconductor device in the vessel containing the solution of HF and ozone water. Preferably, ozone water is subsequently introduced into the vessel to replace the solution of HF and ozone water in the vessel.

Abstract: Methods of forming trench isolation regions include the steps of forming a semiconductor substrate having a trench therein and a masking layer thereon extending adjacent the trench. The masking layer may comprise silicon nitride. A recess-inhibiting layer is then formed on a sidewall of the trench and on a sidewall of the masking layer. Next, a stress-relief layer is formed on the recess-inhibiting layer. This stress-relief layer extends opposite the sidewall of the trench and opposite the sidewall of the masking layer and may comprise silicon nitride. The trench is then filled with a trench isolation layer. A sequence of planarization or etch-back steps are then performed to remove the masking layer and also align an upper surface of the trench isolation layer with a surface of the substrate. At least a portion of the masking layer is removed using a first etchant (e.g.

Abstract: An apparatus for drying a wafer includes a rotating chuck configured to rotate the wafer. A movable de-ionized water supply member and an organic solvent supply member are positioned adjacent a face of the wafer. The de-ionized water supply member supplies de-ionized water onto the wafer, and the organic solvent supply member has a plurality of solvent supply nozzles disposed to supply an organic solvent onto the wafer. The organic solvent supply member includes a first solvent supply member and a second solvent supply member. The de-ionized water supply member and the first solvent supply member move radially between a position adjacent the central portion of the wafer and the edge portion of the wafer.

Abstract: A method of forming a shallow trench isolation type semiconductor device comprises forming an etch protecting layer pattern to define at least one active region on a substrate, forming at least one trench by etching the substrate partially by using the etch protecting layer pattern as an etch mask, forming a thermal-oxide film on an inner wall of the trench, filling the trench having the thermal-oxide film with a CVD silicon oxide layer to form an isolation layer, removing the etch protecting layer pattern from the substrate over which the isolation layer is formed, removing the thermal-oxide film formed on a top end of the inner wall of the trench to a depth of 100 to 350 Å, preferably 200 Å from the upper surface of the substrate, and forming a gate oxide film on the substrate from which the active region and the top end are exposed.

Abstract: A method of cleaning damaged layers and polymer residue on semiconductor devices includes mixing HF and ozone water in a vessel to form a solution of HF and ozone water, and dipping a semiconductor device in the vessel containing the solution of HF and ozone water. Preferably, ozone water is subsequently introduced into the vessel to replace the solution of HF and ozone water in the vessel.