Patents by Inventor Keung Hui
Keung Hui has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10096482Abstract: An apparatus and method for providing target thickness and surface profile uniformity control of a multi-head chemical mechanical polishing (CMP) process is disclosed. An exemplary method includes providing at least two wafers; determining a surface profile of each of the at least two wafers; determining an operation mode for a chemical mechanical polishing (CMP) process based on the surface profiles of the at least two wafers; determining a CMP polishing recipe for each of the at least two wafers based on the operation mode; and performing the CMP process on the at least two wafers based on the determined CMP polishing recipes.Type: GrantFiled: August 10, 2015Date of Patent: October 9, 2018Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Keung Hui, Jin-Ning Sung, Jong-I Mou, Soon-Kang Huang, Yen-Di Tsen
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Patent number: 9323244Abstract: Among other things, one or more systems and techniques for retuning a semiconductor fabrication component are provided. The semiconductor fabrication component, such as an advanced process control (APC) component, is configured to evaluate or adjust various fabrication parameters associated with semiconductor fabrication processing. Processing data associated with the semiconductor fabrication component is evaluated to formulate performance indices used to evaluate performance of parameters used by the semiconductor fabrication component. One or more fabrication process change simulations are performed to generate a component operating behavior data structure indicating how different values for the parameters result in improved or degraded performance by the semiconductor fabrication component. In this way, the component operating behavior data structure is evaluated to identify tuning values for the parameters that are used to retune the semiconductor fabrication component.Type: GrantFiled: September 18, 2013Date of Patent: April 26, 2016Assignee: Taiwan Semiconductor Manufacturing Company LimitedInventors: Keung Hui, Cheng Yen-Wei, Jong-I Mou
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Publication number: 20150348797Abstract: An apparatus and method for providing target thickness and surface profile uniformity control of a multi-head chemical mechanical polishing (CMP) process is disclosed. An exemplary method includes providing at least two wafers; determining a surface profile of each of the at least two wafers; determining an operation mode for a chemical mechanical polishing (CMP) process based on the surface profiles of the at least two wafers; determining a CMP polishing recipe for each of the at least two wafers based on the operation mode; and performing the CMP process on the at least two wafers based on the determined CMP polishing recipes.Type: ApplicationFiled: August 10, 2015Publication date: December 3, 2015Inventors: Keung Hui, Jin-Ning Sung, Jong-I Mou, Soon-Kang Huang, Yen-Di Tsen
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Patent number: 9158301Abstract: An embodiment is a method for semiconductor processing control. The method comprises identifying a key process stage from a plurality of process stages based on a parameter of processed wafers, forecasting a trend for a wafer processed by the key process stage and some of the plurality of process stages based on the parameter, and dispatching the wafer to one of a first plurality of tools in a tuning process stage. The one of the first plurality of tools is determined based on the trend.Type: GrantFiled: June 19, 2014Date of Patent: October 13, 2015Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Sunny Wu, Yen-Di Tsen, Chun-Hsien Lin, Keung Hui, Jo Fei Wang, Jong-I Mou
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Patent number: 9132523Abstract: A method of performing chemical mechanical polish (CMP) processes on a wafer includes providing the wafer; determining a thickness profile of a feature on a surface of the wafer; and, after the step of determining the thickness profile, performing a high-rate CMP process on the feature using a polish recipe to substantially achieve a within-wafer thickness uniformity of the feature. The polish recipe is determined based on the thickness profile.Type: GrantFiled: March 5, 2012Date of Patent: September 15, 2015Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Shen-Nan Lee, Ying-Mei Lin, Yu-Jen Cheng, Keung Hui, Huan-Just Lin
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Patent number: 9102033Abstract: An apparatus and method for providing target thickness and surface profile uniformity control of a multi-head chemical mechanical polishing (CMP) process is disclosed. An exemplary method includes providing at least two wafers; determining a surface profile of each of the at least two wafers; determining an operation mode for a chemical mechanical polishing (CMP) process based on the surface profiles of the at least two wafers; determining a CMP polishing recipe for each of the at least two wafers based on the operation mode; and performing the CMP process on the at least two wafers based on the determined CMP polishing recipes.Type: GrantFiled: November 24, 2010Date of Patent: August 11, 2015Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Keung Hui, Jin-Ning Sung, Huang Soon Kang, Yen-Di Tsen, Jong-I Mou
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Publication number: 20150081081Abstract: Among other things, one or more systems and techniques for retuning a semiconductor fabrication component are provided. The semiconductor fabrication component, such as an advanced process control (APC) component, is configured to evaluate or adjust various fabrication parameters associated with semiconductor fabrication processing. Processing data associated with the semiconductor fabrication component is evaluated to formulate performance indices used to evaluate performance of parameters used by the semiconductor fabrication component. One or more fabrication process change simulations are performed to generate a component operating behavior data structure indicating how different values for the parameters result in improved or degraded performance by the semiconductor fabrication component. In this way, the component operating behavior data structure is evaluated to identify tuning values for the parameters that are used to retune the semiconductor fabrication component.Type: ApplicationFiled: September 18, 2013Publication date: March 19, 2015Applicant: Taiwan Semiconductor Manufacturing Company LimitedInventors: Keung Hui, Cheng Yen-Wei, Jong-I Mou
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Patent number: 8925479Abstract: A system and method for controlling a dosage profile is disclosed. An embodiment comprises separating a wafer into components of a grid array and assigning each of the grid components a desired dosage profile based upon a test to compensate for topology differences between different regions of the wafer. The desired dosages are decomposed into directional dosage components and the directional dosage components are translated into scanning velocities of the ion beam for an ion implanter. The velocities may be fed into an ion implanter to control the wafer-to-beam velocities and, thereby, control the implantation.Type: GrantFiled: November 12, 2012Date of Patent: January 6, 2015Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Keung Hui, Chun-Lin Chang, Jong-I Mou
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Publication number: 20140303765Abstract: An embodiment is a method for semiconductor processing control. The method comprises identifying a key process stage from a plurality of process stages based on a parameter of processed wafers, forecasting a trend for a wafer processed by the key process stage and some of the plurality of process stages based on the parameter, and dispatching the wafer to one of a first plurality of tools in a tuning process stage. The one of the first plurality of tools is determined based on the trend.Type: ApplicationFiled: June 19, 2014Publication date: October 9, 2014Inventors: Sunny Wu, Yen-Di Tsen, Chun-Hsien Lin, Keung Hui, Jo Fei Wang, Jong-I Mou
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Patent number: 8781614Abstract: An embodiment is a method for semiconductor processing control. The method comprises identifying a key process stage from a plurality of process stages based on a parameter of processed wafers, forecasting a trend for a wafer processed by the key process stage and some of the plurality of process stages based on the parameter, and dispatching the wafer to one of a first plurality of tools in a tuning process stage. The one of the first plurality of tools is determined based on the trend.Type: GrantFiled: September 14, 2012Date of Patent: July 15, 2014Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Sunny Wu, Yen-Di Tsen, Chun-Hsien Lin, Keung Hui, Jo Fei Wang, Jong-I Mou
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Publication number: 20130013097Abstract: An embodiment is a method for semiconductor processing control. The method comprises identifying a key process stage from a plurality of process stages based on a parameter of processed wafers, forecasting a trend for a wafer processed by the key process stage and some of the plurality of process stages based on the parameter, and dispatching the wafer to one of a first plurality of tools in a tuning process stage. The one of the first plurality of tools is determined based on the trend.Type: ApplicationFiled: September 14, 2012Publication date: January 10, 2013Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Sunny Wu, Yen-Di Tsen, Chun-Hsien Lin, Keung Hui, Jo Fei Wang, Jong-I Mou
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Patent number: 8309444Abstract: A system and method for controlling a dosage profile is disclosed. An embodiment comprises separating a wafer into components of a grid array and assigning each of the grid components a desired dosage profile based upon a test to compensate for topology differences between different regions of the wafer. The desired dosages are decomposed into directional dosage components and the directional dosage components are translated into scanning velocities of the ion beam for an ion implanter. The velocities may be fed into an ion implanter to control the wafer-to-beam velocities and, thereby, control the implantation.Type: GrantFiled: July 7, 2010Date of Patent: November 13, 2012Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Keung Hui, Chun-Lin Chang, Jong-I Mou
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Patent number: 8295965Abstract: An embodiment is a method for semiconductor processing control. The method comprises identifying a key process stage from a plurality of process stages based on a parameter of processed wafers, forecasting a trend for a wafer processed by the key process stage and some of the plurality of process stages based on the parameter, and dispatching the wafer to one of a first plurality of tools in a tuning process stage. The one of the first plurality of tools is determined based on the trend.Type: GrantFiled: July 19, 2010Date of Patent: October 23, 2012Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Sunny Wu, Yen-Di Tsen, Chun-Hsien Lin, Keung Hui, Jo Fei Wang, Jong-I Mou
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Patent number: 8294124Abstract: An ion implanter system has a movable wafer support for holding a semiconductor wafer and a beam source that generates a beam for implanting ions in the semiconductor wafer while the wafer is moving. A plurality of path segments are identified, through which the wafer support is to move to expose the semiconductor wafer to the ion beam. A first position and a second position are identified for each respective one of the plurality of path segments, such that, when the wafer is in each first position and each second position, a perimeter of the beam projected in a plane of the wafer is tangent to a perimeter of the wafer. The ion implanter is configured to automatically move the wafer along each of the plurality of path segments, starting at the respective first position on each respective path segment and stopping at the respective second position on the same segment, so as to expose the wafer to the beam for implanting ions in the wafer.Type: GrantFiled: January 15, 2010Date of Patent: October 23, 2012Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Keung Hui, Chun-Lin Chang
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Publication number: 20120164918Abstract: A method of performing chemical mechanical polish (CMP) processes on a wafer includes providing the wafer; determining a thickness profile of a feature on a surface of the wafer; and, after the step of determining the thickness profile, performing a high-rate CMP process on the feature using a polish recipe to substantially achieve a within-wafer thickness uniformity of the feature. The polish recipe is determined based on the thickness profile.Type: ApplicationFiled: March 5, 2012Publication date: June 28, 2012Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Shen-Nan Lee, Ying-Mei Lin, Yu-Jen Cheng, Keung Hui, Huan-Just Lin
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Publication number: 20120129431Abstract: An apparatus and method for providing target thickness and surface profile uniformity control of a multi-head chemical mechanical polishing (CMP) process is disclosed. An exemplary method includes providing at least two wafers; determining a surface profile of each of the at least two wafers; determining an operation mode for a chemical mechanical polishing (CMP) process based on the surface profiles of the at least two wafers; determining a CMP polishing recipe for each of the at least two wafers based on the operation mode; and performing the CMP process on the at least two wafers based on the determined CMP polishing recipes.Type: ApplicationFiled: November 24, 2010Publication date: May 24, 2012Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: KEUNG HUI, Jin-Ning Sung, Huang Soon Kang, Yen-Di Tsen, Jong-I Mou
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Patent number: 8129279Abstract: A method of performing chemical mechanical polish (CMP) processes on a wafer includes providing the wafer; determining a thickness profile of a feature on a surface of the wafer; and, after the step of determining the thickness profile, performing a high-rate CMP process on the feature using a polish recipe to substantially achieve a within-wafer thickness uniformity of the feature. The polish recipe is determined based on the thickness profile.Type: GrantFiled: October 13, 2008Date of Patent: March 6, 2012Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Shen-Nan Lee, Ying-Mei Lin, Yu-Jen Cheng, Keung Hui, Huan-Just Lin
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Publication number: 20120016509Abstract: An embodiment is a method for semiconductor processing control. The method comprises identifying a key process stage from a plurality of process stages based on a parameter of processed wafers, forecasting a trend for a wafer processed by the key process stage and some of the plurality of process stages based on the parameter, and dispatching the wafer to one of a first plurality of tools in a tuning process stage. The one of the first plurality of tools is determined based on the trend.Type: ApplicationFiled: July 19, 2010Publication date: January 19, 2012Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Sunny Wu, Yen-Di Tsen, Chun-Hsien Lin, Keung Hui, Jo Fei Wang, Jong-I Mou
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Publication number: 20120009692Abstract: A system and method for controlling a dosage profile is disclosed. An embodiment comprises separating a wafer into components of a grid array and assigning each of the grid components a desired dosage profile based upon a test to compensate for topology differences between different regions of the wafer. The desired dosages are decomposed into directional dosage components and the directional dosage components are translated into scanning velocities of the ion beam for an ion implanter. The velocities may be fed into an ion implanter to control the wafer-to-beam velocities and, thereby, control the implantation.Type: ApplicationFiled: July 7, 2010Publication date: January 12, 2012Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Keung Hui, Chun-Lin Chang, Jong-I Mou
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Publication number: 20110174991Abstract: An ion implanter system has a movable wafer support for holding a semiconductor wafer and a beam source that generates a beam for implanting ions in the semiconductor wafer while the wafer is moving. A plurality of path segments are identified, through which the wafer support is to move to expose the semiconductor wafer to the ion beam. A first position and a second position are identified for each respective one of the plurality of path segments, such that, when the wafer is in each first position and each second position, a perimeter of the beam projected in a plane of the wafer is tangent to a perimeter of the wafer. The ion implanter is configured to automatically move the wafer along each of the plurality of path segments, starting at the respective first position on each respective path segment and stopping at the respective second position on the same segment, so as to expose the wafer to the beam for implanting ions in the wafer.Type: ApplicationFiled: January 15, 2010Publication date: July 21, 2011Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Keung HUI, Chun-Lin CHANG