Patents by Inventor Kevin Badgett

Kevin Badgett has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Integrated circuit with memory built-in self test (MBIST) circuitry having enhanced features and methods
    Patent number: 8639994
    Abstract: Integrated circuits with memory built-in self test (MBIST) circuitry and methods are disclosed that employ enhanced features. In one aspect of the invention, an integrated circuit is provided having MIBST circuitry configured to serially test multiple arrays of memory elements within a component of the integrated circuit and to also conduct parallel initialization of the serially tested arrays. In another aspect of the invention, the MBST circuitry is used set the memory elements of the arrays to a first state and then to an inverse state during a burn-in operation to maintain each of the two opposing states for a desired time in order to either force a failure of the integrated circuit component or produce a pre-stressed component beyond an infancy stage.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: January 28, 2014
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Wei-Yu Chen, Kevin Badgett, Kay Hesse
  • Memory built-in self test (MBIST) circuitry configured to facilitate production of pre-stressed integrated circuits and methods
    Patent number: 8468408
    Abstract: Integrated circuits with memory built-in self test (MBIST) circuitry and methods are disclosed that employ enhanced features. In one aspect of the invention, MBST circuitry is used set memory elements of arrays to a first state and then to an inverse state during a burn-in operation to maintain each of the two opposing states for a desired time in order to either force a failure of the integrated circuit component or produce a pre-stressed component beyond an infancy stage. Preferably, an integrated circuit is provided having MIBST circuitry configured to serially test multiple arrays of memory elements within a component of the integrated circuit and to also conduct parallel initialization of the serially tested arrays.
    Type: Grant
    Filed: September 16, 2010
    Date of Patent: June 18, 2013
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Wei-Yu Chen, Kevin Badgett, Kay Hessee
  • Integrated circuit with memory built-in self test (MBIST) circuitry having enhanced features and methods
    Patent number: 8423846
    Abstract: Integrated circuits with memory built-in self test (MBIST) circuitry and methods are disclosed that employ enhanced features. In one aspect of the invention, an integrated circuit is provided having MIBST circuitry configured to serially test multiple arrays of memory elements within a component of the integrated circuit and to also conduct parallel initialization of the serially tested arrays. In another aspect of the invention, the MBST circuitry is used set the memory elements of the arrays to a first state and then to an inverse state during a burn-in operation to maintain each of the two opposing states for a desired time in order to either force a failure of the integrated circuit component or produce a pre-stressed component beyond an infancy stage.
    Type: Grant
    Filed: September 16, 2010
    Date of Patent: April 16, 2013
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Wei-Yu Chen, Kevin Badgett, Kay Hessee
  • INTEGRATED CIRCUIT WITH MEMORY BUILT-IN SELF TEST (MBIST) CIRCUITRY HAVING ENHANCED FEATURES AND METHODS
    Publication number: 20120072788
    Abstract: Integrated circuits with memory built-in self test (MBIST) circuitry and methods are disclosed that employ enhanced features. In one aspect of the invention, an integrated circuit is provided having MIBST circuitry configured to serially test multiple arrays of memory elements within a component of the integrated circuit and to also conduct parallel initialization of the serially tested arrays. In another aspect of the invention, the MBST circuitry is used set the memory elements of the arrays to a first state and then to an inverse state during a burn-in operation to maintain each of the two opposing states for a desired time in order to either force a failure of the integrated circuit component or produce a pre-stressed component beyond an infancy stage.
    Type: Application
    Filed: September 16, 2010
    Publication date: March 22, 2012
    Applicant: ADVANCED MICRO DEVICES, INC.
    Inventors: Wei-Yu Chen, Kevin Badgett, Kay Hesse
  • MEMORY BUILT-IN SELF TEST (MBIST) CIRCUITRY CONFIGURED TO FACILITATE PRODUCTION OF PRE-STRESSED INTEGRATED CIRCUITS AND METHODS
    Publication number: 20120072789
    Abstract: Integrated circuits with memory built-in self test (MBIST) circuitry and methods are disclosed that employ enhanced features. In one aspect of the invention, MBST circuitry is used set memory elements of arrays to a first state and then to an inverse state during a burn-in operation to maintain each of the two opposing states for a desired time in order to either force a failure of the integrated circuit component or produce a pre-stressed component beyond an infancy stage. Preferably, an integrated circuit is provided having MIBST circuitry configured to serially test multiple arrays of memory elements within a component of the integrated circuit and to also conduct parallel initialization of the serially tested arrays.
    Type: Application
    Filed: September 16, 2010
    Publication date: March 22, 2012
    Applicant: ADVANCED MICRO DEVICES, INC.
    Inventors: Wei-Yu Chen, Kevin Badgett, Kay Hesse