Patents by Inventor Kevin Beaman

Kevin Beaman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070290293
    Abstract: A method of depositing dielectric material into sub-micron spaces and resultant structures is provided. After a trench is etched in the surface of a wafer, a silicon nitride barrier is deposited into the trench. The silicon nitride layer has a high nitrogen content near the trench walls to protect the walls. The silicon nitride layer further from the trench walls has a low nitrogen content and a high silicon content, to allow improved adhesion. The trench is then filled with a spin-on precursor. A densification or reaction process is then applied to convert the spin-on material into an insulator. The resulting trench has a well-adhered insulator which helps the insulating properties of the trench.
    Type: Application
    Filed: August 28, 2007
    Publication date: December 20, 2007
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Jigish Trivedi, Robert Patraw, Kevin Beaman, John Smythe
  • Publication number: 20070004131
    Abstract: A method of depositing dielectric material into sub-micron spaces and resultant structures is provided. After a trench is etched in the surface of a wafer, a silicon nitride barrier is deposited into the trench. The silicon nitride layer has a high nitrogen content near the trench walls to protect the walls. The silicon nitride layer further from the trench walls has a low nitrogen content and a high silicon content, to allow improved adhesion. The trench is then filled with a spin-on precursor. A densification or reaction process is then applied to convert the spin-on material into an insulator. The resulting trench has a well-adhered insulator which helps the insulating properties of the trench.
    Type: Application
    Filed: September 5, 2006
    Publication date: January 4, 2007
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Jigish Trivedi, Robert Patraw, Kevin Beaman, John Smythe
  • Publication number: 20060252207
    Abstract: The invention includes a method of forming a programmable memory device. A tunnel oxide is formed to be supported by a semiconductor substrate. A stack is formed over the tunnel oxide. The stack comprises a floating gate, dielectric mass and control gate. The stack has a top, and has opposing sidewalls extending downwardly from the top. The dielectric mass includes silicon nitride. Silicon nitride spacers are formed along sidewalls of the stack, and a silicon nitride cap is formed over a top of the stack. The silicon nitride within the dielectric mass, cap and/or sidewall spacers is formed from trichlorosilane and ammonia.
    Type: Application
    Filed: July 13, 2006
    Publication date: November 9, 2006
    Inventors: Kevin Beaman, Ronald Weimer
  • Publication number: 20060213440
    Abstract: The present disclosure suggests several systems and methods for batch processing of microfeature workpieces, e.g., semiconductor wafers or the like. One exemplary implementation provides a method of depositing a reaction product on each of a batch of workpieces positioned in a process chamber in a spaced-apart relationship. A first gas may be delivered to an elongate first delivery conduit that includes a plurality of outlets spaced along a length of the conduit. A first gas flow may be directed by the outlets to flow into at least one of the process spaces between adjacent workpieces along a first vector that is transverse to the direction in which the workpieces are spaced. A second gas may be delivered to an elongate second delivery conduit that also has outlets spaced along its length. A second gas flow of the second gas may be directed by the outlets to flow into the process spaces along a second vector that is transverse to the first direction.
    Type: Application
    Filed: May 9, 2006
    Publication date: September 28, 2006
    Applicant: Micron Technology, Inc.
    Inventors: Lingyi Zheng, Trung Doan, Lyle Breiner, Er-Xuan Ping, Kevin Beaman, Ronald Weimer, David Kubista, Cem Basceri
  • Publication number: 20060205187
    Abstract: The present disclosure suggests several systems and methods for batch processing of microfeature workpieces, e.g., semiconductor wafers or the like. One exemplary implementation provides a method of depositing a reaction product on each of a batch of workpieces positioned in a process chamber in a spaced-apart relationship. A first gas may be delivered to an elongate first delivery conduit that includes a plurality of outlets spaced along a length of the conduit. A first gas flow may be directed by the outlets to flow into at least one of the process spaces between adjacent workpieces along a first vector that is transverse to the direction in which the workpieces are spaced. A second gas may be delivered to an elongate second delivery conduit that also has outlets spaced along its length. A second gas flow of the second gas may be directed by the outlets to flow into the process spaces along a second vector that is transverse to the first direction.
    Type: Application
    Filed: May 9, 2006
    Publication date: September 14, 2006
    Applicant: Micron Technology, Inc.
    Inventors: Lingyi Zheng, Trung Doan, Lyle Breiner, Er-Xuan Ping, Kevin Beaman, Ronald Weimer, David Kubista, Cem Basceri
  • Publication number: 20060204649
    Abstract: The present disclosure provides methods and systems for controlling temperature. The method has particular utility in connection with controlling temperature in a deposition process, e.g., in depositing a heat-reflective material via CVD. One exemplary embodiment provides a method that involves monitoring a first temperature outside the deposition chamber and a second temperature inside the deposition chamber. An internal temperature in the deposition chamber can be increased in accordance with a ramp profile by (a) comparing a control temperature to a target temperature, and (b) selectively delivering heat to the deposition chamber in response to a result of the comparison. The target temperature may be determined in accordance with the ramp profile, but the control temperature in one implementation alternates between the first temperature and the second temperature.
    Type: Application
    Filed: May 4, 2006
    Publication date: September 14, 2006
    Applicant: Micron Technology, Inc.
    Inventors: Kevin Beaman, Trung Doan, Lyle Breiner, Ronald Weimer, Er-Xuan Ping, David Kubista, Cem Basceri, Lingyi Zheng
  • Publication number: 20060196538
    Abstract: Systems for depositing material onto workpieces in reaction chambers and methods for removing byproducts from reaction chambers are disclosed herein. In one embodiment, the system includes a gas phase reaction chamber, a first exhaust line coupled to the reaction chamber, first and second traps each in fluid communication with the first exhaust line, and a vacuum pump coupled to the first exhaust line to remove gases from the reaction chamber. The first and second traps are operable independently to individually and/or jointly collect byproducts from the reaction chamber. It is emphasized that this Abstract is provided to comply with the rules requiring an abstract. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.
    Type: Application
    Filed: May 2, 2006
    Publication date: September 7, 2006
    Applicant: Micron Technology, Inc.
    Inventors: David Kubista, Trung Doan, Lyle Breiner, Ronald Weimer, Kevin Beaman, Er-Xuan Ping, Lingyi Zheng, Cem Basceri
  • Publication number: 20060198955
    Abstract: The present disclosure describes apparatus and methods for processing microfeature workpieces, e.g., by depositing material on a microelectronic semiconductor using atomic layer deposition. Some of these apparatus include microfeature workpiece holders that include gas distributors. One exemplary implementation provides a microfeature workpiece holder adapted to hold a plurality of microfeature workpieces. This workpiece holder includes a plurality of workpiece supports and a gas distributor. The workpiece supports are adapted to support a plurality of microfeature workpieces in a spaced-apart relationship to define a process space adjacent a surface of each microfeature workpiece. The gas distributor includes an inlet and a plurality of outlets, with each of the outlets positioned to direct a flow of process gas into one of the process spaces.
    Type: Application
    Filed: May 3, 2006
    Publication date: September 7, 2006
    Applicant: Micron Technology, Inc.
    Inventors: Lingyi Zheng, Trung Doan, Lyle Breiner, Er-Xuan Ping, Ronald Weimer, David Kubista, Kevin Beaman, Cem Basceri
  • Publication number: 20060194452
    Abstract: A method of adjusting the threshold voltage of semiconductor devices by incorporating nitride into the isolation layer so as to decrease the mobility of charge carriers and thereby increase the threshold voltage required to activate the device. The nitrogen incorporation method may comprise of decoupled plasma nitridization (DPN) and the DPN can be performed in-situ during gate oxide formation. The amount of threshold voltage can be varied by adjusting the DPN treatment time and processing parameters.
    Type: Application
    Filed: May 1, 2006
    Publication date: August 31, 2006
    Inventors: Kevin Beaman, John Moore, Ronald Weimer
  • Publication number: 20060194446
    Abstract: A method of adjusting the threshold voltage of semiconductor devices by incorporating nitride into the isolation layer so as to decrease the mobility of charge carriers and thereby increase the threshold voltage required to activate the device. The nitrogen incorporation method may comprise of decoupled plasma nitridization (DPN) and the DPN can be performed in-situ during gate oxide formation. The amount of threshold voltage can be varied by adjusting the DPN treatment time and processing parameters.
    Type: Application
    Filed: May 1, 2006
    Publication date: August 31, 2006
    Inventors: Kevin Beaman, John Moore, Ronald Weimer
  • Publication number: 20060121689
    Abstract: The present disclosure provides methods and apparatus useful in depositing materials on batches of microfeature workpieces. One implementation provides a method in which a quantity of a first precursor gas is introduced to an enclosure at a first enclosure pressure. The pressure within the enclosure is reduced toga second enclosure pressure while introducing a purge gas at a first flow rate. The second enclosure pressure may approach or be equal to a steady-state base pressure of the processing system at the first flow rate. After reducing the pressure, the purge gas flow may be increased to a second flow rate and the enclosure pressure may be increased to a third enclosure pressure. Thereafter, a flow of a second precursor gas may be introduced with a pressure within the enclosure at a fourth enclosure pressure; the third enclosure pressure is desirably within about 10 percent of the fourth enclosure pressure.
    Type: Application
    Filed: January 6, 2006
    Publication date: June 8, 2006
    Inventors: Cem Basceri, Trung Doan, Ronald Weimer, Kevin Beaman, Lyle Breiner, Lingyi Zheng, Er-Xuan Ping, Demetrius Sarigiannis, David Kubista
  • Publication number: 20060115957
    Abstract: The present disclosure provides methods and apparatus useful in depositing materials on batches of microfeature workpieces. One implementation provides a method in which a quantity of a first precursor gas is introduced to an enclosure at a first enclosure pressure. The pressure within the enclosure is reduced to a second enclosure pressure while introducing a purge gas at a first flow rate. The second enclosure pressure may approach or be equal to a steady-state base pressure of the processing system at the first flow rate. After reducing the pressure, the purge gas flow may be increased to a second flow rate and the enclosure pressure may be increased to a third enclosure pressure. Thereafter, a flow of a second precursor gas may be introduced with a pressure within the enclosure at a fourth enclosure pressure; the third enclosure pressure is desirably within about 10 percent of the fourth enclosure pressure.
    Type: Application
    Filed: January 6, 2006
    Publication date: June 1, 2006
    Inventors: Cem Basceri, Trung Doan, Ronald Weimer, Kevin Beaman, Lyle Breiner, Lingyi Zheng, Er-Xuan Ping, Demetrius Sarigiannis, David Kubista
  • Publication number: 20060043521
    Abstract: A method of depositing dielectric material into sub-micron spaces and resultant structures is provided. After a trench is etched in the surface of a wafer, a silicon nitride barrier is deposited into the trench. The silicon nitride layer has a high nitrogen content near the trench walls to protect the walls. The silicon nitride layer further from the trench walls has a low nitrogen content and a high silicon content, to allow improved adhesion. The trench is then filled with a spin-on precursor. A densification or reaction process is then applied to convert the spin-on material into an insulator. The resulting trench has a well-adhered insulator which helps the insulating properties of the trench.
    Type: Application
    Filed: August 24, 2004
    Publication date: March 2, 2006
    Inventors: Jigish Trivedi, Robert Patraw, Kevin Beaman, John Smythe
  • Publication number: 20060008998
    Abstract: The invention encompasses a method of forming a structure over a semiconductor substrate. A silicon dioxide containing layer is formed across at least some of the substrate. Nitrogen is formed within the silicon dioxide containing layer. Substantially all of the nitrogen within the silicon dioxide is at least 10 ? above the substrate. After the nitrogen is formed within the silicon dioxide layer, conductively doped silicon is formed on the silicon dioxide layer. The invention encompasses a method of forming a pair of transistors associated with a semiconductor substrate. First and second regions of the substrate are defined. A first oxide region is formed to cover the first region of the substrate, and to not cover the second region of the substrate. Nitrogen is formed within the first oxide region, and a first conductive layer is formed over the first oxide region. After the first conductive layer is formed, a second oxide region is formed over the second region of the substrate.
    Type: Application
    Filed: September 1, 2005
    Publication date: January 12, 2006
    Inventors: Kevin Beaman, John Moore
  • Publication number: 20050164466
    Abstract: The present disclosure provides small scale capacitors (e.g., DRAM capacitors) and methods of forming such capacitors. One exemplary implementation provides a method of fabricating a capacitor that includes sequentially forming a first electrode, a dielectric layer, and a second electrode. At least one of the electrodes may be formed by a) reacting two precursors to deposit a first conductive layer at a first deposition rate, and b) depositing a second conductive layer at a second, lower deposition rate by depositing a precursor layer of one precursor at least one monolayer thick and exposing that precursor layer to another precursor to form a nanolayer reaction product. The second conductive layer may be in contact with the dielectric layer and have a thickness of no greater than about 50?.
    Type: Application
    Filed: January 28, 2004
    Publication date: July 28, 2005
    Inventors: Lingyi Zheng, Trung Doan, Lyle Breiner, Er-Xuan Ping, Kevin Beaman, Ronald Weimer, Cem Basceri, David Kubista
  • Publication number: 20050126489
    Abstract: The present disclosure provides methods and systems for controlling temperature. The method has particular utility in connection with controlling temperature in a deposition process, e.g., in depositing a heat-reflective material via CVD. One exemplary embodiment provides a method that involves monitoring a first temperature outside the deposition chamber and a second temperature inside the deposition chamber. An internal temperature in the deposition chamber can be increased in accordance with a ramp profile by (a) comparing a control temperature to a target temperature, and (b) selectively delivering heat to the deposition chamber in response to a result of the comparison. The target temperature may be determined in accordance with the ramp profile, but the control temperature in one implementation alternates between the first temperature and the second temperature.
    Type: Application
    Filed: December 10, 2003
    Publication date: June 16, 2005
    Inventors: Kevin Beaman, Trung Doan, Lyle Breiner, Ronald Weimer, Er-Xuan Ping, David Kubista, Cem Basceri, Lingyi Zheng
  • Publication number: 20050081786
    Abstract: Systems for depositing material onto workpieces in reaction chambers and methods for removing byproducts from reaction chambers are disclosed herein. In one embodiment, the system includes a gas phase reaction chamber, a first exhaust line coupled to the reaction chamber, first and second traps each in fluid communication with the first exhaust line, and a vacuum pump coupled to the first exhaust line to remove gases from the reaction chamber. The first and second traps are operable independently to individually and/or jointly collect byproducts from the reaction chamber. It is emphasized that this Abstract is provided to comply with the rules requiring an abstract. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.
    Type: Application
    Filed: October 15, 2003
    Publication date: April 21, 2005
    Inventors: David Kubista, Trung Doan, Lyle Breiner, Ronald Weimer, Kevin Beaman, Er-Xuan Ping, Lingyi Zheng, Cem Basceri
  • Publication number: 20050059261
    Abstract: The present disclosure provides methods and apparatus useful in depositing materials on batches of microfeature workpieces. One implementation provides a method in which a quantity of a first precursor gas is introduced to an enclosure at a first enclosure pressure. The pressure within the enclosure is reduced to a second enclosure pressure while introducing a purge gas at a first flow rate. The second enclosure pressure may approach or be equal to a steady-state base pressure of the processing system at the first flow rate. After reducing the pressure, the purge gas flow may be increased to a second flow rate and the enclosure pressure may be increased to a third enclosure pressure. Thereafter, a flow of a second precursor gas may be introduced with a pressure within the enclosure at a fourth enclosure pressure; the third enclosure pressure is desirably within about 10 percent of the fourth enclosure pressure.
    Type: Application
    Filed: September 17, 2003
    Publication date: March 17, 2005
    Inventors: Cem Basceri, Trung Doan, Ronald Weimer, Kevin Beaman, Lyle Breiner, Lingyi Zheng, Er-Xuan Ping, Demetrius Sarigiannis, David Kubista
  • Publication number: 20050045102
    Abstract: The present disclosure suggests several systems and methods for batch processing of microfeature workpieces, e.g., semiconductor wafers or the like. One exemplary implementation provides a method of depositing a reaction product on each of a batch of workpieces positioned in a process chamber in a spaced-apart relationship. A first gas may be delivered to an elongate first delivery conduit that includes a plurality of outlets spaced along a length of the conduit. A first gas flow may be directed by the outlets to flow into at least one of the process spaces between adjacent workpieces along a first vector that is transverse to the direction in which the workpieces are spaced. A second gas may be delivered to an elongate second delivery conduit that also has outlets spaced along its length. A second gas flow of the second gas may be directed by the outlets to flow into the process spaces along a second vector that is transverse to the first direction.
    Type: Application
    Filed: August 28, 2003
    Publication date: March 3, 2005
    Inventors: Lingyi Zheng, Trung Doan, Lyle Breiner, Er-Xuan Ping, Kevin Beaman, Ronald Weimer, David Kubista, Cem Basceri
  • Publication number: 20050039680
    Abstract: The present disclosure provides methods and apparatus that may be used to process microfeature workpieces, e.g., semiconductor wafers. Some aspects have particular utility in depositing TiN in a batch process. One implementation involves pretreating a surface of a process chamber by contemporaneously introducing first and second pretreatment precursors (e.g., TiCl4 and NH3) to deposit a pretreatment material on a the chamber surface. After the pretreatment, the first microfeature workpiece may be placed in the chamber and TiN may be deposited on the microfeature workpiece by alternately introducing quantities of first and second deposition precursors.
    Type: Application
    Filed: August 21, 2003
    Publication date: February 24, 2005
    Inventors: Kevin Beaman, Ronald Weimer, Lyle Breiner, Er-Xuan Ping, Trung Doan, Cem Basceri, David Kubista, Lingyi Zheng