Abstract: The invention relates to a secure lock for a lift cord of a window blind or shade, which includes a head rail, a bottom rail and a shading unit combined between the head rail and the bottom rail. The shading unit has plural connecting members respectively engaging with an annular secure lock, except the connecting member positioned closest to the bottom rail engaging with a cap-shaped secure lock instead. A lift cord is strung in the annular secure locks, with the end fastened with the cap-shaped secure lock. An opening is formed in a ring of the annular secure locks and a groove formed in a curved portion of the cap-shaped secure lock. Thus, the lift cord can be released if an object is accidentally trapped between the lift cord and the shading unit, achieving a secure effect.

Abstract: A checkpoint retry system for recovery from an error condition in a multiprocessor type central processing unit which may have a store-in or a store-through cache system. At detection of a checkpoint instruction, the system initiates action to save the content of the program status word, the floating point registers, the access registers and the general purpose registers until the store operations are completed for the checkpointed sequence. For processors which have a store-in cache, modified cache data is saved in a store buffer until the checkpointed instructions are completed and then written to a cache which is accessible to other processors in the system. For processors which utilize store-through cache, the modified data for the checkpointed instructions is also stored in the store buffer prior to storage in the system memory.

Abstract: A computing system constructed of multiple processing elements containing private storage, attached to a shared global storage, is called a closely-coupled system. Each processing element may be a single processing unit (PU) with private storage, or a tightly coupled multi-processor unit with private storage. Either type of processing element will be referred to as a Central Processor Complex (CPC), the computing system complex as a whole is referred to as a sysplex. IBM ESA/390 processors provide examples of both single and multi-processor CPC's. For a highly-available shared storage for data-sharing in a multi-processing element environment, highly-available shared storage is provided by a duplexed controllers with non-volatile storage, which is accessed by tightly connected Processing Elements as a single logical copy. Our duplexed controllers provide not only the shared data but also the control information necessary for multi-Processing Element data management with speed-matching processor.

Abstract: Apparatus and method for collecting and analyzing machine check interrupts generated by a central processor complex. Each logic card is scanned to detect the presence of error data generated by logic circuits on the card. A primary maintenance interface card collects the interrupt information identifying the interrupt as to type of interrupt and location of the card generating the interrupt. A system support adapter reports the collected interrupt information over a LAN to a support processor which may thereafter initiate diagnostic operations with the central processor complex.

Abstract: An inpage buffer is used between a cache and slower storage device. When a processor requests data, the cache is checked to see if the data is already in the cache. If not, a request for the data is sent to the slower storage device. The buffer receives the data from the slower storage device and provides the data to the processor that requested the data. The buffer then provides the data to the cache for storage provided that the cache is not working on a separate storage request from the processor. The data will be written into the cache from the buffer when the cache is free from such requests. The buffer is also able to provide data corresponding to subsequent requests provided it contains such data. This may happen if a request for the same data occurs, and the buffer has not yet written the data into the cache. It can also occur if the areas of the cache which can hold data from an area of the slower storage is inoperable for some reason.

Abstract: Programmable masks at ascending levels of processing machine functionality support the programmed injection of errors in response to machine events and machine states and in synchronism with machine operation. Provision is made for varying characteristics of injected errors through a programmable error mask and through generation of an injected error wave form having variable temporal and duration characteristics.