Abstract: Provided are interconnect circuits for interconnecting arrays of devices and methods of forming these interconnect circuits as well as connecting these circuits to the devices. An interconnect circuit may include a conductive layer and one or more insulating layers. The conductive layer may be patterned with openings defining contact pads, such that each pad is used for connecting to a different electrical terminal of the interconnected devices. In some embodiments, each contact pad is attached to the rest of the conductive layer by a fusible link formed from the same conductive layer as the contact pad. The fusible link controls the current flow to and from this contact pad. The insulating layer is laminated to the conductive layer and provides support to the contacts pads. The insulating layer may also be patterned with openings, which allow forming electrical connections between the contact pads and cell terminals through the insulating layer.

Abstract: Provided are interconnect circuits for interconnecting arrays of devices and methods of forming these interconnect circuits as well as connecting these circuits to the devices. An interconnect circuit may include a conductive layer and one or more insulating layers. The conductive layer may be patterned with openings defining contact pads, such that each pad is used for connecting to a different electrical terminal of the interconnected devices. In some embodiments, each contact pad is attached to the rest of the conductive layer by a fusible link formed from the same conductive layer as the contact pad. The fusible link controls the current flow to and from this contact pad. The insulating layer is laminated to the conductive layer and provides support to the contacts pads. The insulating layer may also be patterned with openings, which allow forming electrical connections between the contact pads and cell terminals through the insulating layer.

Abstract: Methods of manufacturing photovoltaic modules are provided. One method includes providing a substrate and depositing a lower electrode above the substrate. The method also includes depositing a lower stack of microcrystalline silicon layers above the lower electrode, depositing an upper stack of amorphous silicon layers above the lower stack of microcrystalline silicon layers, and depositing an upper electrode above the upper stack of amorphous silicon layers. At least one of the lower stack and the upper stack includes an N-I-P stack of silicon layers having an n-doped silicon layer, an intrinsic silicon layer, and a p-doped silicon layer. The intrinsic silicon layer has an energy band gap that is reduced by depositing the intrinsic silicon layer at a temperature of at least 250 degrees Celsius.

Abstract: Organic photovoltaic cells, as well as related components, photovoltaic systems, and methods, are disclosed.

Abstract: Solid state dye sensitized photovoltaic cells, as well as related components, systems, and methods, are disclosed.

Abstract: A photovoltaic device includes: a substrate; lower and upper electrode layers disposed above the substrate; and a semiconductor layer disposed between the lower and upper electrode layers, the semiconductor layer absorbing incident light to excite electrons from the semiconductor layer, wherein the semiconductor layer includes a built-in bypass diode extending between and coupled with the lower and upper electrode layers, the bypass diode permitting electric current to flow through the bypass diode when a reverse bias is applied across the lower and upper electrode layers.

Abstract: Photovoltaic cells integrated with a bypass diode, as well as related systems, components, and methods, are disclosed.

Abstract: Organic photovoltaic cells, as well as related components, photovoltaic systems, and methods, are disclosed.

Abstract: Stable organic devices, as well as related components, systems, and methods, are disclosed.

Abstract: Photovoltaic cells integrated with a bypass diode, as well as related systems, components, and methods, are disclosed.

Abstract: A method and apparatus for measurement of stress in a specimen utilizing a motorized electromagnetic acoustic transducer (EMAT). Stress causes a rotation of the pure-mode polarization directions of SH-waves and a change in the phase of waves polarized along these certain directions. The method utilizes a rotating small-aperture EMAT, connected to a processor, to measure phase and amplitude data as a function of angle. The EMAT is placed on a workpiece at the location where the stress is to be measured. The acoustic birefringence B is determined from the normalized difference of these phases. From these data, an algorithm calculates values of B and &PHgr;. The workpiece is then stressed or its stress state is changed. The values are measured again at the same location. Stress is determined from the change in B and &PHgr;.

Abstract: A method for measurement of stress in a specimen utilizing a motorized electromagnetic acoustic transducer (EMAT). Stress causes a rotation of the pure-mode polarization directions of SH-waves and a change in the phase of waves polarized along these certain directions. The method utilizes a rotating small-aperture EMAT, connected to a processor, to measure phase and amplitude data as a function of angle. The EMAT is placed on a workpiece at the location where the stress is to be measured. The acoustic birefringence B is determined from the normalized difference of these phases. From these data, an algorithm calculates values of B. and &phgr;. The workpiece is then stressed or its stress state is changed. The values are measured again at the same location. Stress is determined from the change in B and &phgr;.