Patents by Inventor Kevin Conley

Kevin Conley has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11488647
    Abstract: Aspects of the present disclosure are directed to magnetic tunnel junction (MTJ) structures comprising multiple MTJ bits connected in series. For example, a magnetic tunnel junction (MTJ) stack according to the present disclosure may include at least a first MTJ bit and a second MTJ bit stacked above the first MTJ bit, and a resistance state of the MTJ stack may be read by passing a single read current through both the first MTJ bit and the second MTJ bit.
    Type: Grant
    Filed: June 27, 2019
    Date of Patent: November 1, 2022
    Assignee: Everspin Technologies, Inc.
    Inventors: Jijun Sun, Frederick Mancoff, Jason Janesky, Kevin Conley, Lu Hui, Sumio Ikegawa
  • Publication number: 20210375342
    Abstract: Aspects of the present disclosure are directed to magnetic tunnel junction (MTJ) structures comprising multiple MTJ bits connected in series. For example, a magnetic tunnel junction (MTJ) stack according to the present disclosure may include at least a first MTJ bit and a second MTJ bit stacked above the first MTJ bit, and a resistance state of the MTJ stack may be read by passing a single read current through both the first MTJ bit and the second MTJ bit.
    Type: Application
    Filed: June 27, 2019
    Publication date: December 2, 2021
    Applicant: Everspin Technologies, Inc.
    Inventors: Jijun SUN, Frederick MANCOFF, Jason JANESKY, Kevin CONLEY, Lu HUI, Sumio IKEGAWA
  • Patent number: 10971545
    Abstract: A magnetoresistive device may include multiple magnetic tunnel junction (MTJ) stacks separated from each other by one or more dielectric material layers and electrically conductive vias extending through the one more dielectric material layers. Each MTJ stack may include multiple MTJ bits arranged one on top of another and the electrically conductive vias may be configured to electrically access each MTJ bit of the multiple MTJ stacks.
    Type: Grant
    Filed: January 11, 2019
    Date of Patent: April 6, 2021
    Assignee: Everspin Technologies, Inc.
    Inventors: Sanjeev Aggarwal, Kevin Conley, Sarin A. Deshpande
  • Publication number: 20190350224
    Abstract: The present invention relates to a method for improving a muscle force and a physical function, comprising combined use of an ingestion of a composition comprising one or more components selected from the group consisting of astaxanthin and its ester and a physical exercise.
    Type: Application
    Filed: May 21, 2019
    Publication date: November 21, 2019
    Applicants: University of Washington, Astavita, Inc.
    Inventors: Kevin Conley, Ziyang Liu, Yasuhiro Ogura
  • Publication number: 20190280045
    Abstract: A magnetoresistive device may include an annular-shaped magnetic tunnel junction (MTJ) bit having an inner end and an outer end. The MTJ bit may include an annular-shaped magnetically free region and an annular-shaped magnetically fixed region separated by an annular-shaped intermediate layer. A first electrical conductor may be in electrical contact with the inner end of the MTJ bit, and a second electrical conductor may be in electrical contact with the outer end of the MTJ bit.
    Type: Application
    Filed: March 6, 2019
    Publication date: September 12, 2019
    Applicant: Everspin Technologies, Inc.
    Inventors: Sanjeev AGGARWAL, Kevin Conley, Sarin A. Deshpande
  • Publication number: 20190221609
    Abstract: A magnetoresistive device may include multiple magnetic tunnel junction (MTJ) stacks separated from each other by one or more dielectric material layers and electrically conductive vias extending through the one more dielectric material layers. Each MTJ stack may include multiple MTJ bits arranged one on top of another and the electrically conductive vias may be configured to electrically access each MTJ bit of the multiple MTJ stacks.
    Type: Application
    Filed: January 11, 2019
    Publication date: July 18, 2019
    Applicant: Everspin Technologies, Inc.
    Inventors: Sanjeev AGGARWAL, Kevin CONLEY, Sarin A. DESHPANDE
  • Publication number: 20150309927
    Abstract: A hybrid non-volatile system uses non-volatile memories based on two or more different non-volatile memory technologies in order to exploit their relative advantages. In an exemplary embodiment, the memory system includes a controller and a flash memory, where the controller has a non-volatile RAM based on an alternate technology such as FeRAM. The flash memory is used for the storage of user data and the non-volatile RAM in the controller is used for system control data. The use of an alternate non-volatile memory technology in the controller allows for a non-volatile copy of the most recent control data to be accessed more quickly as it can be updated on a bit by bit basis. In another exemplary embodiment, the alternate non-volatile memory is used as a cache where data can safely be staged prior to its being written to the memory or read back to the host.
    Type: Application
    Filed: June 12, 2015
    Publication date: October 29, 2015
    Inventors: Alan Welsh Sinclair, Sergey Anatolievich Gorobets, Kevin Conley, Carlos J. Gonzalez
  • Patent number: 9122591
    Abstract: The present invention present methods and architectures for the pipelining of read operation with write operations. In particular, methods are presented for pipelining data relocation operations that allow for the checking and correction of data in the controller prior to its being re-written, but diminish or eliminate the additional time penalty this would normally incur. A number of architectural improve are described to facilitate these methods, including: introducing two registers on the memory where each is independently accessible by the controller; allowing a first memory register to be written from while a second register is written to; introducing two registers on the memory where the contents of the registers can be swapped.
    Type: Grant
    Filed: December 13, 2013
    Date of Patent: September 1, 2015
    Assignee: SanDisk Technologies Inc.
    Inventors: Sergey Gorobets, Kevin Conley
  • Patent number: 8745322
    Abstract: A non-volatile memory system of a type having blocks of memory cells erased together and which are programmable from an erased state in units of a large number of pages per block. If the data of only a few pages of a block are to be updated, the updated pages are written into another block provided for this purpose. Updated pages from multiple blocks are programmed into this other block in an order that does not necessarily correspond with their original address offsets. The valid original and updated data are then combined at a later time, when doing so does not impact on the performance of the memory. If the data of a large number of pages of a block are to be updated, however, the updated pages are written into an unused erased block and the unchanged pages are also written to the same unused block. By handling the updating of a few pages differently, memory performance is improved when small updates are being made.
    Type: Grant
    Filed: June 28, 2013
    Date of Patent: June 3, 2014
    Assignee: SanDisk Technologies Inc.
    Inventors: Kevin Conley, Carlos J. Gonzalez
  • Publication number: 20140108886
    Abstract: The present invention present methods and architectures for the pipelining of read operation with write operations. In particular, methods are presented for pipelining data relocation operations that allow for the checking and correction of data in the controller prior to its being re-written, but diminish or eliminate the additional time penalty this would normally incur. A number of architectural improve are described to facilitate these methods, including: introducing two registers on the memory where each is independently accessible by the controller; allowing a first memory register to be written from while a second register is written to; introducing two registers on the memory where the contents of the registers can be swapped.
    Type: Application
    Filed: December 13, 2013
    Publication date: April 17, 2014
    Applicant: SanDisk Technologies Inc.
    Inventors: Sergey Gorobets, Kevin Conley
  • Patent number: 8126527
    Abstract: This document discusses, among other things, quantification of hemoglobin content, and therefore blood volume, of muscle. An analysis of the optical spectra can determine the ratio of hemoglobin (Hb) to myoglobin (Mb) content in intact muscle. The peak position of the in vivo optical spectra from intact tissue is used to determine the ratio of Hb to Mb contributing to the optical signal. The wavelength of the peak is a linear function of the percent contribution of Hb to the optical spectra. Such analysis in combination with known Mb concentrations yields a non-invasive measure of the Hb content for in vivo muscle.
    Type: Grant
    Filed: August 3, 2006
    Date of Patent: February 28, 2012
    Assignee: University of Washington through its Center for Commercialization
    Inventors: David J. Marcinek, Kevin Conley, Kenneth A. Schenkman
  • Patent number: 8001325
    Abstract: A removable data storage device that intelligently operates as one large data storage region or as multiple, smaller data storage regions is disclosed. The removable data storage device can be used in not only modern electronic products (using 32-bit addressing) but also legacy products (using 16-bit addressing). A host device can couple to the removable storage device to access data stored in/to the removable storage device. As an example, the removable data storage device can be a memory card.
    Type: Grant
    Filed: January 9, 2004
    Date of Patent: August 16, 2011
    Assignee: SanDisk Corporation
    Inventors: Kevin Conley, Robert Chang, Wes G. Brewer, Eric Bone, Yoram Cedar
  • Publication number: 20080065818
    Abstract: The present invention presents a non-volatile memory and method for its operation that ensures reliable mechanism for write and erase abort detection in the event of lost of power during non-volatile memory programming and erasing with minimized system performance penalty. During a multi-sector write process, an indication of a successful write in one sector is written into the overhead of the following sector at the same time as the following sector's data content is written. The last sector written will additionally have an indication of its own successful write written into its overhead. For erase, an erase abort flag in the first sector of the block can be marked after a successful erase operation.
    Type: Application
    Filed: November 7, 2007
    Publication date: March 13, 2008
    Inventors: Jason Lin, Kevin Conley, Robert Chang
  • Publication number: 20080033263
    Abstract: This document discusses, among other things, quantification of hemoglobin content, and therefore blood volume, of muscle. An analysis of the optical spectra can determine the ratio of hemoglobin (Hb) to myoglobin (Mb) content in intact muscle. The peak position of the in vivo optical spectra from intact tissue is used to determine the ratio of Hb to Mb contributing to the optical signal. The wavelength of the peak is a linear function of the percent contribution of Hb to the optical spectra. Such analysis in combination with known Mb concentrations yields a non-invasive measure of the Hb content for in vivo muscle.
    Type: Application
    Filed: August 3, 2006
    Publication date: February 7, 2008
    Inventors: David J. Marcinek, Kevin Conley, Kenneth A. Schenkman
  • Publication number: 20070266200
    Abstract: A system and methods are given for providing information on the amount of life remaining for a memory having a limited lifespan, such as a flash memory card. For example, it can provide a user with the amount of the memory's expected remaining lifetime in real time units (i.e., hours or days) or as a percentage of estimated initial life. An end of life warning can also be provided. In a particular embodiment, the amount of remaining life (either as a percentage or in real time units) can be based on the average number of erases per block, but augmented by the number of spare blocks or other parameters, so that an end of life warning is given if either the expected amount of remaining life falls below a certain level or the number of spare blocks falls below a safe level.
    Type: Application
    Filed: May 15, 2006
    Publication date: November 15, 2007
    Inventors: Sergey Gorobets, Kevin Conley
  • Publication number: 20070266296
    Abstract: Data are encoded using convolutional coding prior to storage in a nonvolatile memory array, so that errors that occur when the data are read may be corrected even where there is a large number of such errors. Coding rates of less than one increase the amount of data to be stored but allow correction of large numbers of errors.
    Type: Application
    Filed: May 15, 2006
    Publication date: November 15, 2007
    Inventor: Kevin Conley
  • Publication number: 20070263444
    Abstract: A system and methods are given for providing information on the amount of life remaining for a memory having a limited lifespan, such as a flash memory card. For example, it can provide a user with the amount of the memory's expected remaining lifetime in real time units (i.e., hours or days) or as a percentage of estimated initial life. An end of life warning can also be provided. In a particular embodiment, the amount of remaining life (either as a percentage or in real time units) can be based on the average number of erases per block, but augmented by the number of spare blocks or other parameters, so that an end of life warning is given if either the expected amount of remaining life falls below a certain level or the number of spare blocks falls below a safe level.
    Type: Application
    Filed: May 15, 2006
    Publication date: November 15, 2007
    Inventors: Sergey Gorobets, Kevin Conley
  • Publication number: 20070266295
    Abstract: Data are encoded using convolutional coding prior to storage in a nonvolatile memory array, so that errors that occur when the data are read may be corrected even where there is a large number of such errors. Coding rates of less than one increase the amount of data to be stored but allow correction of large numbers of errors.
    Type: Application
    Filed: May 15, 2006
    Publication date: November 15, 2007
    Inventor: Kevin Conley
  • Publication number: 20070211532
    Abstract: In order to maintain the integrity of data stored in a flash memory that are susceptible to being disturbed by operations in adjacent regions of the memory, disturb events cause the data to be read, corrected and re-written before becoming so corrupted that valid data cannot be recovered. The sometimes conflicting needs to maintain data integrity and system performance are balanced by deferring execution of some of the corrective action when the memory system has other high priority operations to perform. In a memory system utilizing very large units of erase, the corrective process is executed in a manner that is consistent with efficiently rewriting an amount of data much less than the capacity of a unit of erase.
    Type: Application
    Filed: May 14, 2007
    Publication date: September 13, 2007
    Inventors: Carlos Gonzalez, Kevin Conley
  • Publication number: 20070180062
    Abstract: A portable media encoder with a remote setup management interface is disclosed. The encoder provides a video input port configured to receive a video input from a video input source, an audio input port configured to receive an audio input from an audio input source, and a digital output port for providing a digital output stream corresponding to the received video input and audio input. An encoding processor converts the video input and the audio input into a streamable digital output format for transmitting through the digital output port, and a digital control input port for receives commands from a remote management computer over the Internet using a web browser and provides the commands to the encoding processor. A housing encloses the processor and provides at least one access panel providing user access to the video input port, the audio input port, the digital output port, and the digital control input port.
    Type: Application
    Filed: April 6, 2006
    Publication date: August 2, 2007
    Inventors: Rick Southerland, Mark Fears, Mark Hershey, Chris McCauley, Kevin Conley, Kevin Hartman, Jeremy Gerdes