Abstract: A reversible superconducting circuit includes two Josephson transmission lines. Inductors connect Josephson Junctions in the array. Each transmission line passes a fluxon along the Junctions. The circuit includes an interface with first and second shunt capacitors coupled to the first and second transmission lines, and a third shunt capacitor, forming a connecting circuit with the first and second shunt capacitors. The shunt capacitors include Josephson junctions in parallel. The connecting circuit receives an input fluxon and transmits an output fluxon. The circuit also includes a Josephson Junction and inductor in parallel with the third shunt capacitor, forming a storage circuit. The storage circuit stores a SFQ. The output fluxon has polarity based on the SFQ stored when the first fluxon is received. The input fluxon causes the polarity of the stored SFQ to be the same as the polarity of the input fluxon, immediately after the input fluxon is received.

Abstract: A reversible superconducting circuit includes two Josephson transmission lines. Inductors connect Josephson Junctions in the array. Each transmission line passes a fluxon along the Junctions. The circuit includes an interface with first and second shunt capacitors coupled to the first and second transmission lines, and a third shunt capacitor, forming a connecting circuit with the first and second shunt capacitors. The shunt capacitors include Josephson junctions in parallel. The connecting circuit receives an input fluxon and transmits an output fluxon. The circuit also includes a Josephson Junction and inductor in parallel with the third shunt capacitor, forming a storage circuit. The storage circuit stores a SFQ. The output fluxon has polarity based on the SFQ stored when the first fluxon is received. The input fluxon causes the polarity of the stored SFQ to be the same as the polarity of the input fluxon, immediately after the input fluxon is received.

Abstract: A CNOT gate includes a clock line, splitter, and first and second store-and-launch gates (SNLs) to each output a fluxon in accordance with a clock fluxon and polarities of an input fluxon and the clock fluxon. The CNOT gate also includes first and second IDSN gates. When one fluxon input is received, the IDSN gate outputs one fluxon in accordance with a polarity of the fluxon input. When two fluxon inputs are received, the IDSN gate outputs two fluxons in accordance with an inverse polarity of the fluxon inputs. The CNOT gate also includes first and second NOT gates to receive a fluxon output from the first IDSN gate and output a fluxon of opposite polarity, and a third NOT gate to receive a fluxon output from the second IDSN gate and output a fluxon of opposite polarity.

Abstract: A reversible superconducting circuit includes a plurality of Josephson transmission lines. A first line is configured to transmit a control fluxon when a first input is active. A second line is configured to transmit a target fluxon to one of a third and a fourth line. The circuit is configured to transmit the fluxons at substantially the same time. The second line is configured to transmit the target fluxon to the third line, due to an interaction between the control fluxon and the target fluxon, only if the control fluxon is transmitted at substantially the same time as the target fluxon. The second line is configured to transmit the target fluxon to the fourth line, due to following an adiabatic trajectory, only if no control fluxon is transmitted at substantially the same time as the target fluxon.