Abstract: A method of flexographically printing a uniform pattern on a substrate where the ink deposited on the substrate is deposited in the intended location and not in unintended locations. A flexo-master comprises a pattern formed by a plurality of lines including at least one junction, and printing the pattern including the at least one junction in ink on a substrate forming a printed pattern, wherein the printed junction has a different shape than the at least one junction on the flexo-master. In addition to the junction formation, a discontinuous line on the flexo-master may be used to print a continuous line, a single line may be used to print two lines, and two or more lines may be used to print a single line. The flexo-master pattern lines may additionally have a fill pattern comprising various geometries that are used to uniformly print the pattern on the substrate.

Abstract: A method of flexographically printing a uniform pattern on a substrate where the ink deposited on the substrate is deposited in the intended location and not in unintended locations. A flexo-master comprises a pattern formed by a plurality of lines including at least one junction, and printing the pattern including the at least one junction in ink on a substrate forming a printed pattern, wherein the printed junction has a different shape than the at least one junction on the flexo-master. In addition to the junction formation, a discontinuous line on the flexo-master may be used to print a continuous line, a single line may be used to print two lines, and two or more lines may be used to print a single line. The flexo-master pattern lines may additionally have a fill pattern comprising various geometries that are used to uniformly print the pattern on the substrate.

Abstract: An addressing mechanism for charging and discharging quasi-capacitive elements in an X-Y matrix. The addressing mechanism may be configured to toggle a resistor-capacitor (RC) time constant between large and small values such as by opening or closing a circuit path to a low impedance resistor disposed in parallel with a higher impedance in-line resistor. When this occurs, elements in the X-Y matrix can be addressed and controlled. The X-Y matrix may be comprised of multiple “rows” and “columns” of conductors where crosstalk may occur along the columns and rows. Crosstalk may be curtailed by using either hysteresis management or global control of the row's impedance along its entire length. The resulting control obviates the need for active devices at each matrix element to perform the switching functions.

Abstract: An addressing mechanism for charging and discharging quasi-capacitive elements in an X-Y matrix. The addressing mechanism may be configured to toggle a resistor-capacitor (RC) time constant between large and small values such as by opening or closing a circuit path to a low impedance resistor disposed in parallel with a higher impedance in-line resistor. When this occurs, elements in the X-Y matrix can be addressed and controlled. The X-Y matrix may be comprised of multiple “rows” and “columns” of conductors where crosstalk may occur along the columns and rows. Crosstalk may be curtailed by using either hysteresis management or global control of the row's impedance along its entire length. The resulting control obviates the need for active devices at each matrix element to perform the switching functions.

Abstract: A circuit for implementing a registration-free, contiguous conductive plane. A circuit may include a plurality of conductive structures in a first plane. The circuit may further include a contiguous conductive equipotential surface in a second plane parallel to the first plane. The circuit may further include activation means configured to adjust an electric field between the first and second planes thereby activating one or more structures in the first plane by increasing a potential difference between the first and second planes to a threshold level deemed to constitute an active state. The circuit may further include deactivation means configured to adjust the electric field between the first and second planes thereby deactivating one or more structures in the first plane by decreasing the potential difference between the first and second planes below a threshold level deemed to constitute a deactivated state.

Abstract: An addressing mechanism for charging and discharging quasi-capacitive elements in an X-Y matrix. The addressing mechanism may be configured to toggle a resistor-capacitor (RC) time constant between large and small values such as by opening or closing a circuit path to a low impedance resistor disposed in parallel with a higher impedance in-line resistor. When this occurs, elements in the X-Y matrix can be addressed and controlled. The X-Y matrix may be comprised of multiple “rows” and “columns” of conductors where crosstalk may occur along the columns and rows. Crosstalk may be curtailed by using either hysteresis management or global control of the row's impedance along its entire length. The resulting control obviates the need for active devices at each matrix element to perform the switching functions.

Abstract: A circuit for implementing a registration-free, contiguous conductive plane. A circuit may include a plurality of conductive structures in a first plane. The circuit may further include a contiguous conductive equipotential surface in a second plane parallel to the first plane. The circuit may further include activation means configured to adjust an electric field between the first and second planes thereby activating one or more structures in the first plane by increasing a potential difference between the first and second planes to a threshold level deemed to constitute an active state. The circuit may further include deactivation means configured to adjust the electric field between the first and second planes thereby deactivating one or more structures in the first plane by decreasing the potential difference between the first and second planes below a threshold level deemed to constitute a deactivation state.

Abstract: A circuit for implementing a registration-free, contiguous conductive plane. A circuit may include a plurality of conductive structures in a first plane. The circuit may further include a contiguous conductive equipotential surface in a second plane parallel to the first plane. The circuit may further include activation means configured to adjust an electric field between the first and second planes thereby activating one or more structures in the first plana by increasing a potential difference between the first and second planes to a threshold level deemed to constitute an active state. The circuit may further include deactivation means configured to adjust the electric field between the first and second planes thereby deactivating one or more structures in the first plane by decreasing the potential difference between the first and second planes below a threshold level deemed to constitute a deactivation state.