Abstract: A display system for a vehicle may include a display configured to present a dynamic horizontal situation display, a processor programmed to receive vehicle data from at least one vehicle sensor, the vehicle data indicating at least one of roll, pitch, and yaw of the vehicle, present, via the display, at least one ownship cue symbol overlaid on the horizontal situation display, and dynamically update the at least one ownship cue symbol based on at least one of the roll, pitch, and yaw of the vehicle based on the vehicle data to provide visual aids regarding the roll, pitch, and yaw to a pilot.

Abstract: Methods and systems to write to redundant storage latches, or storage cells, including soft error upset tolerant latches and feedback-interlocked redundant storage cells, including to write a logic value to one of a plurality of same sense storage nodes, and to write a complementary logic value to a selected one of a plurality of opposite sense storage nodes responsive to the logic value. Remaining storage nodes may be written to through circuitry within the storage cell. Logic values may be output substantially simultaneously with corresponding write operations. A system may include a multiple logic level write circuit to write to the first same sense storage node, and first and second single logic level write circuits to write to the first and second opposite sense storage nodes, respectively.

Abstract: Methods and systems to write to redundant storage latches, or storage cells, including soft error upset tolerant latches and feedback-interlocked redundant storage cells, including to write a logic value to one of a plurality of same sense storage nodes, and to write a complementary logic value to a selected one of a plurality of opposite sense storage nodes responsive to the logic value. Remaining storage nodes may be written to through circuitry within the storage cell. Logic values may be output substantially simultaneously with corresponding write operations. A system may include a multiple logic level write circuit to write to the first same sense storage node, and first and second single logic level write circuits to write to the first and second opposite sense storage nodes, respectively.