Abstract: An apparatus is provided. The apparatus comprising a voltage controlled oscillator (VCO), an amplifier, a switch, a calibration capacitor, and a control loop. The VCO includes a capacitive network that receives a first tuning voltage that is based at least in part on an input signal and a switched capacitor array that is coupled to the capacitive network. The amplifier amplifies the difference between the reference voltage and the first tuning voltage. The switch receives the reference voltage and the amplified difference between the reference voltage and the first tuning voltage. The calibration capacitor receives the output from the switch and generates a second tuning voltage. The control loop receives the input signal and the second tuning voltage.

Abstract: Phase locked loops (PLLs) are commonly employed in synthesizers, and there is ever increasing pressure to build PLLs that have better performance using low cost and low voltage digital complementary metal oxide semiconductor (CMOS) processes. Here, a PLL is generally provided that employs several continuous (analog) control loops and a digital “Bang-Bang” control loop. This PLL provide superior performance over other conventional PLL in terms of its low noise characteristics and its rapid settling time.

Abstract: A digitally tuned and linearized low voltage crystal oscillator integrated circuit requires only an oscillator crystal as external circuitry. The inventive circuit operates at voltages of 3.3V and below and requires no other off-chip components. A crystal oscillator, such as a Pierce crystal oscillator uses an inverting gain stage and a phase shift network composed of an array of switchable capacitors and the crystal. The design offers improvements in power consumption, area, manufacturability and cost.