Abstract: An environmental control system includes a broadcast-type controller area network (CAN) bus and a plurality of configurable modular controllers coupled to the CAN bus. Each of the plurality of configurable modular controllers includes a modular controller card with a microprocessor and a modular driver board configured to connect and disconnect to and from the controller card. The environmental control system further includes one or more sensors and a primary controller. The sensors are configured to sense one or more parameter values and to provide the one or more parameter values on the CAN bus. The primary controller is configured to communicate with each of the configurable modular controllers via the CAN bus.

Abstract: A peripheral component interconnect (PCI) device is provided for use in an environmental control and life support system (ECLSS). The PCI device includes a control card, mounting slots each of which is receptive of the control card and coupled with a piece of ECLSS equipment and a backplane configured to respectively provide, via communication and power signals, communications and power to the control card in any one of the mounting slots. With the control card received in one of the mounting slots, the control card accommodates multiple power levels, executes commutation logic and executes one or more of active current control and active current modulation in accordance with the one of the mounting slots and the piece of the ECLSS equipment coupled therewith.

Abstract: A computer-implemented method for performing stability analysis for a digital motor controller includes receiving a reference signal to be injected into a digital speed control loop and controlling, by a hardware description language (VHDL) component, the injection of the reference signal into the digital control loop through a field programmable gate array (FPGA) hardware interface. The method also includes providing the reference signal to the digital speed control loop to determine a performance of the digital motor controller and receiving a feedback signal, at the FPGA hardware interface, from the digital speed control loop based on the reference signal. The method includes comparing the reference signal to the feedback signal to evaluate the performance of the digital motor controller and exporting a result of the comparing by the FPGA hardware interface to indicate the performance of the digital motor controller.

Abstract: A counter is started on the falling edge of a tach pulse. This counter counts to the rising edge of a second tach pulse, such as the next tach pulse. During the duration of the tach pulse the FPGA calculates the RPM of a motor. In this way, during each commutation period, a RPM is calculated. The present system performs a RPM calculation during each commutation period and/or tach pulse duration.

Abstract: A computer-implemented method for performing stability analysis for a digital motor controller includes receiving a reference signal to be injected into a digital speed control loop and controlling, by a hardware description language (VHDL) component, the injection of the reference signal into the digital control loop through a field programmable gate array (FPGA) hardware interface. The method also includes providing the reference signal to the digital speed control loop to determine a performance of the digital motor controller and receiving a feedback signal, at the FPGA hardware interface, from the digital speed control loop based on the reference signal. The method includes comparing the reference signal to the feedback signal to evaluate the performance of the digital motor controller and exporting a result of the comparing by the FPGA hardware interface to indicate the performance of the digital motor controller.

Abstract: A system for detecting sensor failure and/or operating with a failed sensor in an electrical machine includes an electrical machine, three or more sensors configured to connect to the electrical machine, and a sensor module operatively connected to each sensor to receive sensor signals from the sensors. The sensor module includes a failure detection module operatively connected to each sensor and configured to determine if each sensor is a failed sensor or a functioning sensor. The sensor module also includes a virtual sensor module operatively connected to the failure detection module and configured to output simulated sensor signals for the failed sensor, wherein the sensor module is configured to output the sensor signals for each functioning sensor. The system includes a control module operatively connected to the sensor module and the electrical machine to receive sensor signals and simulated sensor signals to control operation of the electrical machine.

Abstract: A system for detecting sensor failure and/or operating with a failed sensor in an electrical machine includes an electrical machine, three or more sensors configured to connect to the electrical machine, and a sensor module operatively connected to each sensor to receive sensor signals from the sensors. The sensor module includes a failure detection module operatively connected to each sensor and configured to determine if each sensor is a failed sensor or a functioning sensor. The sensor module also includes a virtual sensor module operatively connected to the failure detection module and configured to output simulated sensor signals for the failed sensor, wherein the sensor module is configured to output the sensor signals for each functioning sensor. The system includes a control module operatively connected to the sensor module and the electrical machine to receive sensor signals and simulated sensor signals to control operation of the electrical machine.

Abstract: A system includes a first control system configured to operate at a first clock speed, a second control system configured to provide an output to the first control system and configured to operate at a second clock speed different from the first clock speed, and a synchronization module operatively connecting the first control module to the second control module and configured to synchronize the first control system and the second control system such that the output of the second control system is timed to synchronize with the first clock speed.

Abstract: A sensorless motor controller includes a variable link control, including a radiation-hardened field programmable gate array (FPGA) and a back electromotive force (EMF) decoder circuit. The back EMF decoder infers the position of a rotor of the motor. A filter on the decoder conditions the back EMF signal and has multiple cutoff frequencies which can be dynamically controlled by the FPGA in order to compensate for phase shift in the back EMF signal. The FPGA also controls a variable DC link and its digital speed control loop.

Abstract: A system includes a first control system configured to operate at a first clock speed, a second control system configured to provide an output to the first control system and configured to operate at a second clock speed different from the first clock speed, and a synchronization module operatively connecting the first control module to the second control module and configured to synchronize the first control system and the second control system such that the output of the second control system is timed to synchronize with the first clock speed.

Abstract: As each tach pulse time duration is known a priori, it may be utilized by a system to an advantage. A counter may be started on the falling edge of a tach pulse. This counter may count to the rising edge of a second tach pulse, such as the next tech pulse. During the duration of the tach pulse the FPGA may calculate the RPM of a motor. In this way, during each commutation period, a RPM may be calculated. In contrast to legacy systems where a RPM calculation may have been performed every other tach pulse, the present system may perform a RPM calculation during each commutation period and/or tach pulse duration. Stated another way, the calculation of the delta of the commutation period less the tach pulse duration may be determined while the counter is idle.

Abstract: A sensorless motor controller includes a variable link control, including a radiation-hardened field programmable gate array (FPGA) and a back electromotive force (EMF) decoder circuit. The back EMF decoder infers the position of a rotor of the motor. A filter on the decoder conditions the back EMF signal and has multiple cutoff frequencies which can be dynamically controlled by the FPGA in order to compensate for phase shift in the back EMF signal. The FPGA also controls a variable DC link and its digital speed control loop.

Abstract: A body armor assembly includes a plurality of rigid tiles that are supported in a manner to provide movement and flexibility while still providing the protection of rigid armor. In a disclosed example, a tile holder maintains a plurality of tiles in a selected alignment. The tile holder maintains a minimum overlap dimension between adjacent tiles. Some of the tiles are maintained by the tile holder in a manner that allows for the overlap dimension to increase beyond the minimum overlap dimension. In a disclosed example, at least two rigid layers have at least one ballistic material layer between them to provide a rigid armor material composition.

Abstract: A body armor assembly includes a plurality of rigid tiles that are supported in a manner to provide movement and flexibility while still providing the protection of rigid armor. In a disclosed example, a tile holder maintains a plurality of tiles in a selected alignment. The tile holder maintains a minimum overlap dimension between adjacent tiles. Some of the tiles are maintained by the tile holder in a manner that allows for the overlap dimension to increase beyond the minimum overlap dimension. In a disclosed example, at least two rigid layers have at least one ballistic material layer between them to provide a rigid armor material composition.

Abstract: A compact field programmable gate array (FPGA)-based digital motor controller (102), a method, and a design structure are provided. The compact FPGA-based digital motor controller (102) includes a sensor interface (206) configured to receive sensor data from one or more sensors (104) and generate conditioned sensor data. The one or more sensors (104) provide position information for a DC brushless motor (108). The compact FPGA-based digital motor controller (102) also includes a commutation control (210) configured to create switching commands to control commutation for the DC brushless motor (108). The commutation control (210) generates commutation pulses from the conditioned sensor data of the sensor interface (206). The compact FPGA-based digital motor controller (102) also includes a time inverter (208) configured to receive the commutation pulses.