Patents by Inventor Kevin Grundy

Kevin Grundy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070236901
    Abstract: A signal-segregating connector for use in a system having a printed circuit board, a first electrical structure and a second electrical structure. The connector includes a first set of conductive elements to convey signals between the first electrical structure and the printed circuit board, and a second set of conductive elements to convey signals between the first electrical structure and the second electrical structure.
    Type: Application
    Filed: May 14, 2007
    Publication date: October 11, 2007
    Inventors: Kevin Grundy, Gary Yasumura, Joseph Fjelstad, William Wiedemann, Para Segaram
  • Publication number: 20070178774
    Abstract: An electrical interconnection device for establishing redundant contacts between the ends of two conductive elements to be mated, creating a electrical interconnection without capacitive stubs.
    Type: Application
    Filed: December 1, 2006
    Publication date: August 2, 2007
    Inventors: Gary Yasumura, Joseph Fjelstad, Kevin Grundy, William Wiedemann, Matthew Stepovich
  • Publication number: 20060157846
    Abstract: An IC package having multiple surfaces for interconnection with interconnection elements making connections from the IC chip to the I/O terminations of the package assembly which reside on more than one of its surfaces and which make interconnections to other devices or assemblies that are spatially separated.
    Type: Application
    Filed: February 13, 2006
    Publication date: July 20, 2006
    Inventors: Joseph Fjelstad, Para Segaram, Thomas Obenhuber, Kevin Grundy, Inessa Obenhuber
  • Publication number: 20060091507
    Abstract: Disclosed are IC package structures comprised of standard IC packages modified with separate circuit interconnection structures and disposed to interconnect either directly to other IC packages or to intermediate pedestal connectors which serve to support and interconnect various circuit elements, thus effectively allowing critical signals to bypass the generally less capable interconnection paths within standard interconnection substrates.
    Type: Application
    Filed: July 14, 2005
    Publication date: May 4, 2006
    Inventors: Joseph Fjelstad, Kevin Grundy, Gary Yasumura
  • Publication number: 20060035482
    Abstract: An electrical connector. An electrical connector comprising a connector body having a first channel and a first conductive element extending through the first channel in a first tip section. The first tip section having a first moment arm that, when forced in contact with a first conductive surface, twists the first conductive element to produce a torsion force. The torsion force holds the first tip section in contact with the first conductive surface.
    Type: Application
    Filed: May 6, 2005
    Publication date: February 16, 2006
    Inventors: Gary Yasumura, William Wiedemann, Joseph Fjelstad, Para Segaram, Kevin Grundy
  • Publication number: 20060034061
    Abstract: A signal-segregating connector for use in a system having a printed circuit board, a first electrical structure and a second electrical structure. The connector includes a first set of conductive elements to convey signals between the first electrical structure and the printed circuit board, and a second set of conductive elements to convey signals between the first electrical structure and the second electrical structure.
    Type: Application
    Filed: April 1, 2005
    Publication date: February 16, 2006
    Inventors: Kevin Grundy, Gary Yasumura, Joseph Fjelstad, William Wiedemann, Para Segaram
  • Publication number: 20050239300
    Abstract: An electrical connector comprised of a plurality of electrical contacts arranged in a stair-step configuration designed to mate with electrical components having electrical contacts arranged in a stair-step configuration. A direct connect signaling system comprised of stair-step electrical connectors mated to stair-step printed circuit boards, other stair-step electrical components, or combinations thereof.
    Type: Application
    Filed: February 9, 2005
    Publication date: October 27, 2005
    Inventors: Gary Yasumura, Joseph Fjelstad, William Wiedemann, Para Segaram, Kevin Grundy
  • Publication number: 20050221680
    Abstract: An electrical interconnection device for establishing redundant contacts between the ends of two conductive elements to be mated, creating a electrical interconnection without capacitive stubs.
    Type: Application
    Filed: March 28, 2005
    Publication date: October 6, 2005
    Inventors: Gary Yasumura, Joseph Fjelstad, Kevin Grundy, William Wiedemann, Matthew Stepovich
  • Publication number: 20050215089
    Abstract: Interconnection assemblies which adjust their alignment and performance through the use of control feedback from the data transferred through the assemblies.
    Type: Application
    Filed: March 28, 2005
    Publication date: September 29, 2005
    Inventors: Kevin Grundy, Gary Yasumura
  • Publication number: 20050189640
    Abstract: Structures employed by a plurality of packages, printed circuit boards, connectors and interposers to create signal paths which reduce the deleterious signal quality issues associated with the use of through-holes. Disclosed structures can coexist with through-hole implementations.
    Type: Application
    Filed: February 9, 2005
    Publication date: September 1, 2005
    Inventors: Kevin Grundy, Joseph Fjelstad, Gary Yasumura, William Wiedemann, Para Segaram
  • Publication number: 20050146821
    Abstract: An IC package substrate having integral ESD protection features and elements and a method for construction of the same are disclosed
    Type: Application
    Filed: January 7, 2005
    Publication date: July 7, 2005
    Inventors: Joseph Fjelstad, Kevin Grundy
  • Publication number: 20050133922
    Abstract: Disclosed are tapered dielectric and conductor structures which provide controlled impedance interconnection while signal conductor lines transition from finer pitches to coarser pitches thereby obviating electrical discontinuities generally associated with changes of circuit contact pitch. Also disclosed are methods for the construction of the devices and applications therefore.
    Type: Application
    Filed: November 12, 2004
    Publication date: June 23, 2005
    Inventors: Joseph Fjelstad, Kevin Grundy, Para Segaram, Gary Yasumura
  • Publication number: 20050103522
    Abstract: Disclosed are stair stepped PCB structures which provide high performance, direct path, via-less interconnections between various elements of an electronic interconnection structure including, among others, IC packages and connectors.
    Type: Application
    Filed: November 15, 2004
    Publication date: May 19, 2005
    Inventors: Kevin Grundy, William Wiedemann, Joseph Fjelstad
  • Publication number: 20050093152
    Abstract: A cost effective, high performance, IC package assembly of the present invention comprises stair-stepped layers of redistribution circuits from at least one chip to terminals on any of multiple surfaces and levels of the IC package assembly. Critical path circuits of the assembly have no plated vias and are directly routed from interconnection terminals which are used to interconnect the package to the IC chip terminals by flip chip or wire bond methods.
    Type: Application
    Filed: October 12, 2004
    Publication date: May 5, 2005
    Inventors: Joseph Fjelstad, Para Segaram, Thomas Obenhuber, Inessa Obenhuber, Kevin Grundy, William Wiedemann
  • Publication number: 20050093127
    Abstract: An IC package having multiple surfaces for interconnection with interconnection elements making connections from the IC chip to the I/O terminations of the package assembly which reside on more than one of its surfaces and which make interconnections to other devices or assemblies that are spatially separated.
    Type: Application
    Filed: September 23, 2004
    Publication date: May 5, 2005
    Inventors: Joseph Fjelstad, Para Segaram, Thomas Obenhuber, Inessa Obenhuber, Kevin Grundy
  • Patent number: 5784571
    Abstract: In a video system having an encoder and multiple decoders, a snooping circuit in each decoder compares an address on a common data bus to determine whether encoded video data is read or written by a host computer. When the address on the common data bus is detected to be an address within a predetermined range, the read or write data on the common data bus is latched into a first-in-first-out (FIFO) memory. A decoding circuit in each decoder decodes from the FIFO memory to provide a decoded video data output stream. In this manner, multiple decoders can be supported by the video system without additional bandwidth demand on the host computer.
    Type: Grant
    Filed: December 14, 1995
    Date of Patent: July 21, 1998
    Assignee: Minerva Systems, Inc.
    Inventors: Thierry Mantopoulos, Fabrice Quinard, Kevin Grundy