Patents by Inventor Kevin Hsieh

Kevin Hsieh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6627387
    Abstract: A method of photolithography. An anti-reflective coating is formed on the conductive layer. An nitrogen plasma treatment is performed. A photo-resist layer is formed and patterned on the anti-reflective coating. The conductive layer is defined. The photo-resist layer is removed. The anti-reflective layer is removed by using phosphoric acid.
    Type: Grant
    Filed: April 5, 2001
    Date of Patent: September 30, 2003
    Assignee: United Microelectronics Corp.
    Inventors: Kevin Hsieh, Chih-Yung Lin, Chih-Hsiang Hsiao, Juan-Yuan Wu, Water Lur
  • Publication number: 20020031726
    Abstract: A method of photolithography. An anti-reflective coating is formed on the conductive layer. An nitrogen plasma treatment is performed. A photo-resist layer is formed and patterned on the anti-reflective coating. The conductive layer is defined. The photo-resist layer is removed. The anti-reflective layer is removed by using phosphoric acid.
    Type: Application
    Filed: April 5, 2001
    Publication date: March 14, 2002
    Inventors: Kevin Hsieh, Chih-Yung Lin, Chih-Hsiang Hsiao, Juan-Yuan Wu, Water Lur
  • Patent number: 6287967
    Abstract: A self-aligned silicide process. A substrate has at least a transistor formed thereon. A thin metal layer is formed over the substrate. A first rapid thermal process is performed to make the metal layer react with polysilicon of the gate and of the source/drain regions to form a first metal silicide layer. The metal layer, which does not react with polysilicon, is removed. A selective raised salicide process is performed to form a second metal silicide layer on the first metal silicide layer. A second rapid thermal process is performed to transform the first metal silicide layer and the second metal silicide layer from a high-resistance C49 phase into a low-resistance C54 phase.
    Type: Grant
    Filed: November 30, 1999
    Date of Patent: September 11, 2001
    Assignee: United Microelectronics Corp.
    Inventors: Kevin Hsieh, Michael W C Huang, Wen-Yi Hsieh
  • Patent number: 6046097
    Abstract: A deposition method for improving the step coverage of contact holes is disclosed. The method includes initially placing a semiconductor substrate on a chuck of a chamber, wherein the substrate has some contact holes. The chuck is firstly adjusted and conductive material is firstly deposited onto the substrate, wherein the direction of the first deposition is about vertical to the surface of the substrate, and therefore the bottom of the contact holes is then substantially deposited with the conductive material. Next, the chuck is secondly adjusted so that it has a tilt angle between the direction of the second deposition and rotation axis of the chuck. Finally, the chuck is continuously rotated and the conductive material is secondly deposited onto the substrate, and therefore the sidewall of the contact holes is then substantially deposited with the conductive material.
    Type: Grant
    Filed: March 23, 1999
    Date of Patent: April 4, 2000
    Assignee: United Microelectronics Corp.
    Inventors: Kevin Hsieh, Kun-Chih Wang, Wen-Yi Hsieh