Abstract: Aspects of the subject technology relate to electronic devices having microphones. An electronic device may include a microphone and a resonator for the microphone. The resonator may be formed in a device structure that is spatially separated from the microphone. The resonator may be formed in an interior wall of a housing of the electronic device, or in a support structure within an enclosure of the electronic device. A resonator and/or one or more damping features, may reduce a resonance effect, on the microphone, of a resonant cavity within the enclosure of the electronic device and adjacent the microphone.

Abstract: A mounting bracket is provided for an electrical device that can be configured for use with a support that has a first and a second rail. The mounting bracket can include a mounting body with a mounting face configured to secure the electrical device to the mounting bracket between the first and second rails when the mounting bracket is secured to the support. The mounting bracket can include a first attachment device connected to the mounting body and a second attachment device connected to the mounting body opposite the first attachment device. Each of the first and second attachment devices can include a first arm configured to engage with a first side of the corresponding first or second rail, and a second arm configured to engage with a second side of the corresponding rail, opposite the first arm.

Abstract: Examples are disclosed related to forming solder joints between printed circuits by using radiant heat. One example provides a method of manufacturing an electronic device, the method comprising aligning a contact of a first printed circuit with a via of a second printed circuit. The method further comprises applying radiant heat via an infrared light source to a second surface of the second printed circuit, the radiant heat incident on the via to cause the via to conduct heat to solder located at an interface of the contact and the via, and after heating the solder to reflow, cooling the solder, thereby forming a solder joint between the contact of the first printed circuit and the via of the second printed circuit.

Abstract: Examples are disclosed related to forming solder joints between printed circuits by using radiant heat. One example provides a method of manufacturing an electronic device, the method comprising aligning a contact of a first printed circuit with a via of a second printed circuit. The method further comprises applying radiant heat via an infrared light source to a second surface of the second printed circuit, the radiant heat incident on the via to cause the via to conduct heat to solder located at an interface of the contact and the via, and after heating the solder to reflow, cooling the solder, thereby forming a solder joint between the contact of the first printed circuit and the via of the second printed circuit.

Abstract: A multistage tubular reaction system and method for preparing methylol derivatives of an aldehyde includes a tubular reaction system with a plurality of successive reactor stages provided with a formaldehyde containing feed stream. The system includes multiple feed ports for the staged addition of C2 or higher condensible aldehyde and/or base to the formaldehyde containing stream at a plurality of successive feed points to provide a production stream, which is progressively provided with additional reactants as the production stream advances through the successive reaction stages. Advantages include better temperature control and reduced byproduct formation.

Abstract: A multistage tubular reaction system and method for preparing methylol derivatives of an aldehyde includes a tubular reaction system with a plurality of successive reactor stages provided with a formaldehyde containing feed stream. The system includes multiple feed ports for the staged addition of C2 or higher condensible aldehyde and/or base to the formaldehyde containing stream at a plurality of successive feed points to provide a production stream, which is progressively provided with additional reactants as the production stream advances through the successive reaction stages. Advantages include better temperature control and reduced byproduct formation.

Abstract: In one form, an audio processor circuit includes a first digital signal processing circuit, a second digital signal processing circuit, and an interleaver. The first digital signal processing circuit has an input for receiving a far-end audio signal, and an output. The second digital signal processing circuit has an input for receiving a digital near-end audio signal, and an output. The interleaver has a first input coupled to the output of the first digital signal processing circuit, a second input coupled to the output of the second digital signal processing circuit, and an output for alternatively providing signals received from the first and second inputs to the output.

Abstract: In one form, an audio processor circuit includes a first digital signal processing circuit, a second digital signal processing circuit, and an interleaver. The first digital signal processing circuit has an input for receiving a far-end audio signal, and an output. The second digital signal processing circuit has an input for receiving a digital near-end audio signal, and an output. The interleaver has a first input coupled to the output of the first digital signal processing circuit, a second input coupled to the output of the second digital signal processing circuit, and an output for alternatively providing signals received from the first and second inputs to the output.

Abstract: A system and method for reducing active power in processors is disclosed. A method embodiment comprises the steps of determining when a particular logic block is inactive, determining the powered state of the particular logic block, isolating the particular logic block from a main processor core, and powering off the particular logic block. When the system needs the particular logic block, the method further comprises reactivating the block. A system embodiment comprises software and a processor coupled to a clock control module, an isolation control module and a header/footer module, operable to isolate a particular logic block and power off a particular logic block, thereby reducing power. Another embodiment comprises a logic module coupled to a clock by a clock gating module, an isolation module for isolating the logic module, a header/footer module for disabling power to the logic module, and a power and clock gating control module for controlling the clock gating module and the header/footer module.

Abstract: Methods for determining a quality of a light source applied to a photolithographic process are provided. An image sensor array is exposed to a light from a light source. Addresses and respective intensities corresponding to a plurality of locations on a pupil map representing intensity of the light from on the image sensor array. At least one of an inner curve and an outer curve of the pupil map is defined based upon the collected addresses and respective intensities. The light source is applied to a photolithographic process if the addresses have a predetermined pattern relative to the at least one of the inner curve and the outer curve.

Abstract: Methods for determining a quality of a light source applied to a photolithographic process are provided. An image sensor array is exposed to a light from a light source. Addresses and respective intensities corresponding to a plurality of locations on a pupil map representing intensity of the light from on the image sensor array. At least one of an inner curve and an outer curve of the pupil map is defined based upon the collected addresses and respective intensities. The light source is applied to a photolithographic process if the addresses have a predetermined pattern relative to the at least one of the inner curve and the outer curve.

Abstract: A system and method for reducing active power in processors is disclosed. A method embodiment comprises the steps of determining when a particular logic block is inactive, determining the powered state of the particular logic block, isolating the particular logic block from a main processor core, and powering off the particular logic block. When the system needs the particular logic block, the method further comprises reactivating the block. A system embodiment comprises software and a processor coupled to a clock control module, an isolation control module and a header/footer module, operable to isolate a particular logic block and power off a particular logic block, thereby reducing power. Another embodiment comprises a logic module coupled to a clock by a clock gating module, an isolation module for isolating the logic module, a header/footer module for disabling power to the logic module, and a power and clock gating control module for controlling the clock gating module and the header/footer module.

Abstract: Methods for determining a quality of a light source applied to a photolithographic process are provided. An image sensor array is exposed to a light from a light source. Addresses and respective intensities corresponding to a plurality of locations on a pupil map representing intensity of the light from on the image sensor array. At least one of an inner curve and an outer curve of the pupil map is defined based upon the collected addresses and respective intensities. The light source is applied to a photolithographic process if the addresses have a predetermined pattern relative to the at least one of the inner curve and the outer curve.

Abstract: Methods for determining a quality of a light source applied to a photolithographic process are provided. An image sensor array is exposed to a light from a light source. Addresses and respective intensities corresponding to a plurality of locations on a pupil map representing intensity of the light from on the image sensor array. At least one of an inner curve and an outer curve of the pupil map is defined based upon the collected addresses and respective intensities. The light source is applied to a photolithographic process if the addresses have a predetermined pattern relative to the at least one of the inner curve and the outer curve.

Abstract: Methods and systems for utilizing consumer transaction data to target and aggregate consumers for a group purchase involve maintaining a database storing transaction data consisting at least in part of data related to product purchase transactions for a plurality of consumers and analyzing the data related to product purchase transactions to identify members of a group of said plurality of consumers with a purchase history indicative of a preference for purchasing products in at least one pre-defined category of products.

Abstract: Computer-implemented methods and systems for managing a special-purpose financial account involve establishing the account by a financial institution for a consumer relating to at least one consumer-designated future purchase for a pre-determined purchase price. Thereafter, contributions to a principal balance of the account are received and interest is accrued on the principal balance by the financial institution until the principal balance and accrued interest reaches a consumer-designated target amount, at which time, the principal balance and accrued interest are disposed of according to pre-defined parameters that can involve forfeiture of the accrued interest, depending on the consumer's actions.

Abstract: Computer-implemented methods and systems for managing consumer transactional accounts provides a temporary line of credit with an installment option that a consumer can use for specific occasions or life events. The account remains open for only a limited period of time during which interest does not accrue. Thereafter, the account automatically expires, interest begins to accrue on the amount charged on the account, and an invoice is sent to the consumer with a number of payment options.

Abstract: A wideband predistortion system compensates for a nonlinear amplifier's frequency and time dependent distortion characteristics. The system comprises a data structure in which each element stores a set of compensation parameters (preferably including FIR filter coefficients) for predistorting the wideband input transmission signal. The parameter sets are preferably indexed within the data structure according to multiple signal characteristics, such as instantaneous amplitude and integrated signal envelope, each of which corresponds to a respective dimension of the data structure. To predistort the input transmission signal, an addressing circuit digitally generates a set of data structure indices from the input transmission signal, and the indexed set of compensation parameters is loaded into a compensation circuit which digitally predistorts the input transmission signal.

Abstract: Methods for determining a quality of a light source applied to a photolithographic process are provided. An image sensor array is exposed to a light from a light source. Addresses and respective intensities corresponding to a plurality of locations on a pupil map representing intensity of the light from on the image sensor array. At least one of an inner curve and an outer curve of the pupil map is defined based upon the collected addresses and respective intensities. The light source is applied to a photolithographic process if the addresses have a predetermined pattern relative to the at least one of the inner curve and the outer curve.

Abstract: Methods for determining a quality of a light source applied to a photolithographic process are provided. An image sensor array is exposed to a light from a light source. Addresses and respective intensities corresponding to a plurality of locations on a pupil map representing intensity of the light from on the image sensor array. At least one of an inner curve and an outer curve of the pupil map is defined based upon the collected addresses and respective intensities. The light source is applied to a photolithographic process if the addresses have a predetermined pattern relative to the at least one of the inner curve and the outer curve.