Patents by Inventor Kevin J. Anderson
Kevin J. Anderson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11970485Abstract: Disclosed herein are compounds of formula I: or a pharmaceutically acceptable salt thereof, where the variables are as defined herein. These compounds are useful in treating RET associated cancers. Formulations containing the compounds of formula I and methods of making the compounds of formula I are also disclosed.Type: GrantFiled: October 19, 2022Date of Patent: April 30, 2024Assignee: ELI LILLY AND COMPANYInventors: Gabrielle R. Kolakowski, Erin D. Anderson, Steven W. Andrews, Christopher Pierre Albert Jean Boldron, Kevin R. Condroski, Thomas C. Irvin, Manoj Kumar, Elizabeth A. McFaddin, Megan L. McKenney, Johnathan Alexander McLean, Tiphaine Mouret, Michael J. Munchhof, Thomas Pierre Dino Pancaldi, Michael Alexander Pilkington-Miksa, Marta Pinto
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Patent number: 11964968Abstract: Provided herein are RET kinase inhibitors according to the formula: pharmaceutically acceptable salts thereof, pharmaceutical compositions thereof, and methods for their use in the treatment of diseases that can be treated with a RET kinase inhibitor, including RET-associated diseases and disorders. A, R1, n, X1, X2, X3, X4, and R2 have the meanings given in the specification.Type: GrantFiled: February 6, 2023Date of Patent: April 23, 2024Assignee: ELI LILLY AND COMPANYInventors: Erin D. Anderson, Steven W. Andrews, Kevin R. Condroski, Thomas C. Irvin, Gabrielle R. Kolakowski, Manoj Kumar, Elizabeth A. McFaddin, Megan McKenney, Michael J. Munchhof, Michael B. Welch
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Patent number: 11944130Abstract: A vaporizer device includes various modular components. The vaporizer device includes a first subassembly. The first subassembly includes a cartridge connector that secures a vaporizer cartridge to the vaporizer device and includes at least two receptacle contacts that electrically communicate with the vaporizer cartridge. The vaporizer device includes a second subassembly. The second subassembly includes a skeleton defining a rigid tray that retains at least a power source. The vaporizer device also includes a third subassembly. The third subassembly includes a plurality of charging contacts that supply power to the power source, and an end cap that encloses an end of the vaporizer device.Type: GrantFiled: December 24, 2020Date of Patent: April 2, 2024Assignee: JUUL Labs, Inc.Inventors: Samuel C. Anderson, Wei-Ling Chang, Brandon Cheung, Steven Christensen, Joseph Chun, Joseph R. Fisher, Jr., Nicholas J. Hatton, Kevin Lomeli, James Monsees, Andrew L. Murphy, Claire O'Malley, John R. Pelochino, Hugh Pham, Vipul V. Rahane, Matthew J. Taschner, Val Valentine, Kenneth Wong
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Patent number: 11929300Abstract: An integrated circuit (IC) package with an embedded heat spreader in a redistribution layer (RDL) is provided. IC packaging facilitates a high density package for ICs, including monolithic microwave integrated circuits (MMICs). However, IC packaging may result in reduced heat removal from an IC, decreasing radio frequency (RF) circuit performance. In an exemplary aspect, an IC package is provided which incorporates an embedded heat spreader within a dielectric layer of an RDL coupled to an IC die. The embedded heat spreader provides efficient heat transfer, robust RF performance, and operation through millimeter wave (mmW) frequencies, all in a miniature low-cost, low-profile surface mountable (SM) package.Type: GrantFiled: February 23, 2023Date of Patent: March 12, 2024Assignee: Qorvo US, Inc.Inventors: Kevin J. Anderson, Andrew Arthur Ketterson, Tarak A. Railkar, Deep C. Dumka, Christo Bojkov
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Publication number: 20230207415Abstract: An integrated circuit (IC) package with an embedded heat spreader in a redistribution layer (RDL) is provided. IC packaging facilitates a high density package for ICs, including monolithic microwave integrated circuits (MMICs). However, IC packaging may result in reduced heat removal from an IC, decreasing radio frequency (RF) circuit performance. In an exemplary aspect, an IC package is provided which incorporates an embedded heat spreader within a dielectric layer of an RDL coupled to an IC die. The embedded heat spreader provides efficient heat transfer, robust RF performance, and operation through millimeter wave (mmW) frequencies, all in a miniature low-cost, low-profile surface mountable (SM) package.Type: ApplicationFiled: February 23, 2023Publication date: June 29, 2023Inventors: Kevin J. Anderson, Andrew Arthur Ketterson, Tarak A. Railkar, Deep C. Dumka, Christo Bojkov
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Publication number: 20230178486Abstract: Backside metallization techniques for a semiconductor assembly are disclosed. In one aspect, a die, such as a radio frequency (RF) die, within a semiconductor package may include backside metallization for RF performance reasons. The metallization is generally planar and covers a surface of the RF die. Exemplary aspects of the present disclosure cause the metallization to include trenches or grooves to allow for better expansion and contraction during thermal cycling of the RF die. In particular, the trenches decrease a modulus of the metallization layer and act as a shock absorber and allow for compression and expansion of the metallization to match the compression and expansion of the non-metal substrate of the RF die. By allowing for better matching of the compression and expansion of the two heterogeneous materials, delamination may be delayed or averted.Type: ApplicationFiled: March 31, 2022Publication date: June 8, 2023Inventors: Tarak A. Railkar, Kevin J. Anderson, Tejpal Kaur Hooghan, Deep C. Dumka
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Patent number: 11626340Abstract: An integrated circuit (IC) package with an embedded heat spreader in a redistribution layer (RDL) is provided. IC packaging facilitates a high density package for ICs, including monolithic microwave integrated circuits (MMICs). However, IC packaging may result in reduced heat removal from an IC, decreasing radio frequency (RF) circuit performance. In an exemplary aspect, an IC package is provided which incorporates an embedded heat spreader within a dielectric layer of an RDL coupled to an IC die. The embedded heat spreader provides efficient heat transfer, robust RF performance, and operation through millimeter wave (mmW) frequencies, all in a miniature low-cost, low-profile surface mountable (SM) package.Type: GrantFiled: December 12, 2019Date of Patent: April 11, 2023Assignee: Qorvo US, Inc.Inventors: Kevin J. Anderson, Andrew Arthur Ketterson, Tarak A. Railkar, Deep C. Dumka, Christo Bojkov
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Publication number: 20210183722Abstract: An integrated circuit (IC) package with an embedded heat spreader in a redistribution layer (RDL) is provided. IC packaging facilitates a high density package for ICs, including monolithic microwave integrated circuits (MMICs). However, IC packaging may result in reduced heat removal from an IC, decreasing radio frequency (RF) circuit performance. In an exemplary aspect, an IC package is provided which incorporates an embedded heat spreader within a dielectric layer of an RDL coupled to an IC die. The embedded heat spreader provides efficient heat transfer, robust RF performance, and operation through millimeter wave (mmW) frequencies, all in a miniature low-cost, low-profile surface mountable (SM) package.Type: ApplicationFiled: December 12, 2019Publication date: June 17, 2021Inventors: Kevin J. Anderson, Andrew Arthur Ketterson, Tarak A. Railkar, Deep C. Dumka
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Patent number: 10390434Abstract: The present disclosure relates to a microelectronic package, which includes a base substrate, a perimeter wall, an electronic component, and a mold compound. The perimeter wall extends from a periphery of the base substrate to form a cavity that is over the base substrate and within the perimeter wall. The electronic component is mounted on the base substrate and exposed to the cavity. The electronic component is thermally coupled to a thermal management component, which extends through the base substrate and conducts heat generated from the electronic component. The electronic component is also electrically coupled to a wall signal via, which extends through the perimeter wall and transmits signals. The mold compound resides over the base substrate and within the cavity, so as to encapsulate the electronic component.Type: GrantFiled: October 8, 2018Date of Patent: August 20, 2019Assignee: Qorvo US, Inc.Inventors: Kevin J. Anderson, Tarak A. Railkar, Walid M. Meliane
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Publication number: 20190116670Abstract: The present disclosure relates to a microelectronic package, which includes a base substrate, a perimeter wall, an electronic component, and a mold compound. The perimeter wall extends from a periphery of the base substrate to form a cavity that is over the base substrate and within the perimeter wall. The electronic component is mounted on the base substrate and exposed to the cavity. The electronic component is thermally coupled to a thermal management component, which extends through the base substrate and conducts heat generated from the electronic component. The electronic component is also electrically coupled to a wall signal via, which extends through the perimeter wall and transmits signals. The mold compound resides over the base substrate and within the cavity, so as to encapsulate the electronic component.Type: ApplicationFiled: October 8, 2018Publication date: April 18, 2019Inventors: Kevin J. Anderson, Tarak A. Railkar, Walid M. Meliane
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Patent number: 10217685Abstract: The present disclosure relates to an air-cavity package, which includes a bottom substrate, a top substrate, a perimeter wall, a bottom electronic component, and a top electronic component. The bottom substrate includes a bottom signal via extending through the bottom substrate and the top substrate includes a top signal via extending through the top substrate. The perimeter wall extends between a periphery of the top substrate and a periphery of the bottom substrate to form a cavity. The bottom electronic component is mounted on the bottom substrate, exposed to the cavity, and electrically coupled to the bottom signal via. The top electronic component is mounted on the top substrate, exposed to the cavity, and electrically coupled to the top signal via.Type: GrantFiled: March 7, 2018Date of Patent: February 26, 2019Assignee: Qorvo US, Inc.Inventors: Kevin J. Anderson, Ning Chen
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Patent number: 10217686Abstract: The present disclosure relates to an air-cavity package, which includes a bottom substrate, a top substrate, a perimeter wall, a bottom electronic component, a top electronic component, and an external electronic component. The perimeter wall extends from a periphery of a lower side of the top substrate to a periphery of an upper side of the bottom substrate to form a cavity. The bottom electronic component is mounted on the upper side of the bottom substrate and exposed to the cavity. The top electronic component is mounted on the lower side of the top substrate and exposed to the cavity. And the external electronic component is mounted on an upper side of the top substrate, which is opposite the lower side of the top substrate and not exposed to the cavity.Type: GrantFiled: March 26, 2018Date of Patent: February 26, 2019Assignee: Qorvo US, Inc.Inventors: Walid M. Meliane, Kevin J. Anderson, Tarak A. Railkar
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Patent number: 10177064Abstract: The present disclosure relates to an air-cavity package, which includes a substrate, a base, and a semiconductor die. The substrate includes a substrate body, thermal vias extending through the substrate body, and a metal trace on a bottom side of the substrate body and separate from the thermal vias. The base includes a base body, a perimeter wall extending about a perimeter of the base body, and a signal via structure. Herein, the bottom side of the substrate body resides on the perimeter wall to form a cavity, and the signal via structure extends through the perimeter wall and is electrically coupled to the metal trace. The semiconductor die is mounted on the bottom side of the substrate body, exposed to the cavity, and electrically coupled to the metal trace. The thermal vias conduct heat generated from the semiconductor die toward a top side of the substrate body.Type: GrantFiled: November 30, 2016Date of Patent: January 8, 2019Assignee: Qorvo US, Inc.Inventors: Kevin J. Anderson, Anthony Chiu, Tarak A. Railkar
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Publication number: 20180218955Abstract: The present disclosure relates to an air-cavity package, which includes a bottom substrate, a top substrate, a perimeter wall, a bottom electronic component, a top electronic component, and an external electronic component. The perimeter wall extends from a periphery of a lower side of the top substrate to a periphery of an upper side of the bottom substrate to form a cavity. The bottom electronic component is mounted on the upper side of the bottom substrate and exposed to the cavity. The top electronic component is mounted on the lower side of the top substrate and exposed to the cavity. And the external electronic component is mounted on an upper side of the top substrate, which is opposite the lower side of the top substrate and not exposed to the cavity.Type: ApplicationFiled: March 26, 2018Publication date: August 2, 2018Inventors: Walid M. Meliane, Kevin J. Anderson, Tarak A. Railkar
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Publication number: 20180197800Abstract: The present disclosure relates to an air-cavity package, which includes a bottom substrate, a top substrate, a perimeter wall, a bottom electronic component, and a top electronic component. The bottom substrate includes a bottom signal via extending through the bottom substrate and the top substrate includes a top signal via extending through the top substrate. The perimeter wall extends between a periphery of the top substrate and a periphery of the bottom substrate to form a cavity. The bottom electronic component is mounted on the bottom substrate, exposed to the cavity, and electrically coupled to the bottom signal via. The top electronic component is mounted on the top substrate, exposed to the cavity, and electrically coupled to the top signal via.Type: ApplicationFiled: March 7, 2018Publication date: July 12, 2018Inventors: Kevin J. Anderson, Ning Chen
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Patent number: 9991181Abstract: The present disclosure relates to an air-cavity package, which includes a bottom substrate, a top substrate, a perimeter wall, a bottom electronic component, a top electronic component, and an external electronic component. The perimeter wall extends from a periphery of a lower side of the top substrate to a periphery of an upper side of the bottom substrate to form a cavity. The bottom electronic component is mounted on the upper side of the bottom substrate and exposed to the cavity. The top electronic component is mounted on the lower side of the top substrate and exposed to the cavity. And the external electronic component is mounted on an upper side of the top substrate, which is opposite the lower side of the top substrate and not exposed to the cavity.Type: GrantFiled: January 19, 2017Date of Patent: June 5, 2018Assignee: Qorvo US, Inc.Inventors: Walid M. Meliane, Kevin J. Anderson, Tarak A. Railkar
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Patent number: 9974158Abstract: The present disclosure relates to an air-cavity package, which includes a bottom substrate with a first heat dissipation interface, a top substrate with a second heat dissipation interface, a perimeter wall, a bottom electronic component, and a top electronic component. The perimeter wall extends between a periphery of the top substrate and a periphery of the bottom substrate to form a cavity. The bottom electronic component is mounted on the bottom substrate, exposed to the cavity, and thermally coupled to a bottom thermally conductive structure, which extends through the bottom substrate and towards the first heat dissipation interface. The top electronic component is mounted on the top substrate, exposed to the cavity, and thermally coupled to a top thermally conductive structure, which extends through the top substrate and towards the second heat dissipation interface.Type: GrantFiled: January 19, 2017Date of Patent: May 15, 2018Assignee: Qorvo US, Inc.Inventors: Tarak A. Railkar, Kevin J. Anderson, Walid M. Meliane
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Patent number: 9935026Abstract: The present disclosure relates to an air-cavity package, which includes a bottom substrate, a top substrate, a perimeter wall, a bottom electronic component, and a top electronic component. The bottom substrate includes a bottom signal via extending through the bottom substrate and the top substrate includes a top signal via extending through the top substrate. The perimeter wall extends between a periphery of the top substrate and a periphery of the bottom substrate to form a cavity. The bottom electronic component is mounted on the bottom substrate, exposed to the cavity, and electrically coupled to the bottom signal via. The top electronic component is mounted on the top substrate, exposed to the cavity, and electrically coupled to the top signal via.Type: GrantFiled: January 19, 2017Date of Patent: April 3, 2018Assignee: Qorvo US, Inc.Inventors: Kevin J. Anderson, Ning Chen
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Publication number: 20180061725Abstract: The present disclosure relates to an air-cavity package, which includes a bottom substrate, a top substrate, a perimeter wall, a bottom electronic component, a top electronic component, and an external electronic component. The perimeter wall extends from a periphery of a lower side of the top substrate to a periphery of an upper side of the bottom substrate to form a cavity. The bottom electronic component is mounted on the upper side of the bottom substrate and exposed to the cavity. The top electronic component is mounted on the lower side of the top substrate and exposed to the cavity. And the external electronic component is mounted on an upper side of the top substrate, which is opposite the lower side of the top substrate and not exposed to the cavity.Type: ApplicationFiled: January 19, 2017Publication date: March 1, 2018Inventors: Walid M. Meliane, Kevin J. Anderson, Tarak A. Railkar
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Publication number: 20180061726Abstract: The present disclosure relates to an air-cavity package, which includes a bottom substrate, a top substrate, a perimeter wall, a bottom electronic component, and a top electronic component. The bottom substrate includes a bottom signal via extending through the bottom substrate and the top substrate includes a top signal via extending through the top substrate. The perimeter wall extends between a periphery of the top substrate and a periphery of the bottom substrate to form a cavity. The bottom electronic component is mounted on the bottom substrate, exposed to the cavity, and electrically coupled to the bottom signal via. The top electronic component is mounted on the top substrate, exposed to the cavity, and electrically coupled to the top signal via.Type: ApplicationFiled: January 19, 2017Publication date: March 1, 2018Inventors: Kevin J. Anderson, Ning Chen