Abstract: An improved integrated avionics system having a plurality of line replacement units (LRUs) is disclosed. At least one LRU stores in its memory software and configuration data stored and used by another LRU in the system. Upon detecting a new LRU installation, the at least one LRU may be configured to copy to its internal memory the software and configuration data loaded to the new LRU. The LRU may also store a table in its internal memory identifying each LRU that has been installed in the system, when each LRU was installed, and a copy of configuration and software data loaded to each LRU. If one of the LRUs in the system needs to be replaced, the LRU may determine which software and configuration data is applicable to the replaced LRU and load the determined software and configuration data to the new LRU, thereby improving the loading and installation process.

Abstract: An improved integrated avionics system having a plurality of line replacement units (LRUs) is disclosed. At least one LRU stores in its memory software and configuration data stored and used by another LRU in the system. Upon detecting a new LRU installation, the at least one LRU may be configured to copy to its internal memory the software and configuration data loaded to the new LRU. The LRU may also store a table in its internal memory identifying each LRU that has been installed in the system, when each LRU was installed, and a copy of configuration and software data loaded to each LRU. If one of the LRUs in the system needs to be replaced, the LRU may determine which software and configuration data is applicable to the replaced LRU and load the determined software and configuration data to the new LRU, thereby improving the loading and installation process.

Abstract: A data processing system having a mathematically consistent condition code architecture is disclosed for implementing single instruction range checking and limiting operations. The data processing system includes condition code flags that are set to provide indications of the occurrence of arithmetic overflow and the direction of the arithmetic overflow for all of the possible arithmetic operations that can be performed by an arithmetic logic unit within the digital processing system. Based upon the indicated occurrence of arithmetic overflow and the direction of the overflow, the numeric value of a software variable generated by one of the arithmetic operations is limited to an appropriate upper or lower bound of a predetermined range of acceptable values, if the numeric value was generated with the occurrence of arithmetic overflow, or the numeric value was generated without the occurrence of overflow, but was outside of the acceptable range of values.